Changeset - bff9c47f83da
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kripperger@CL-SEC241-09.cedarville.edu - 12 years ago 2013-04-03 17:04:10
kripperger@CL-SEC241-09.cedarville.edu
Configuring Geiger
4 files changed with 24 insertions and 6 deletions:
0 comments (0 inline, 0 general)
slave/slave/lib/geiger.c
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@@ -44,6 +44,23 @@ uint16_t geiger_getCpm()
 
 
uint8_t geiger_getCount()	//DEBUG
 
{
 
	return counts;
 
}
 
 
void geiger_on();
 
{
 
	// Turn the Flyback Transformer on
 
	PORTA |= (1 << PA1);	//ON
 
	}
 
}
 
 
void geiger_refresh();
 
{
 
	// Turn the Flyback Transformer off
 
	PORTA &= ~(1 << PA1);	//OFF
 
	_delay_ms(1);
 
 
	// Turn the Flyback Transformer on
 
	PORTA |= (1 << PA1);	//ON
 
}
 
}
slave/slave/lib/geiger.h
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@@ -8,8 +8,9 @@
 
 
#ifndef GEIGER_H_
 
#define GEIGER_H_
 
 
uint16_t geiger_getCpm();
 
uint8_t geiger_getCount();	//DEBUG
 
void led_on(void);
 
 
#endif /* GEIGER_H_ */
 
\ No newline at end of file
slave/slave/lib/inputOutput.c
Show inline comments
 
@@ -40,13 +40,13 @@ int8_t	moduleID;	// Slave Module ID from
 
 }
 
 
 
  
 
 void io_readModuleId()
 
 {
 
	// Get ID from rotary dip and return it. 
 
	moduleID = 0;
 
	moduleID = 2;
 
	
 
	/*
 
	// This method is temporary as the next release will read the module ID from EEPROM
 
	PORTC |= (1 << PC2);	// Pull pins on rotary dip high
 
	PORTC |= (1 << PC3);	// Pull pins on rotary dip high
 
	PORTC |= (1 << PC4);	// Pull pins on rotary dip high
 
@@ -54,16 +54,16 @@ int8_t	moduleID;	// Slave Module ID from
 
	
 
	moduleID = ((PINC & 0b00011100) >> 2);		// Read Dip Encoder
 
	moduleID = ~moduleID;						//Invert Dip reading
 
	moduleID = (moduleID & 0b0111);				//Mask bits
 
	*/
 
 
	while(moduleID==0)           //UNCOMMENT ALL THIS
 
	{
 
		moduleID = i2c_read(EEPROM_ADDR, 0x05);
 
	}
 
//	while(moduleID==0)           //UNCOMMENT ALL THIS
 
//	{
 
//		moduleID = i2c_read(EEPROM_ADDR, 0x05);
 
//	}
 
 }
 
 
 
 
 
 uint8_t io_getModuleId()
 
 {
 
	return moduleID;
slave/slave/modules.c
Show inline comments
 
@@ -88,13 +88,13 @@
 
 }
 
  
 
 void modules_geiger_setup()
 
 {
 
	// Pin setup
 
	DDRA &= ~(1 << DDA0);	// PA0 is an input
 
	
 
	DDRA |= (1 << DDA1);	// PA1 is an output	
 
	
 
	 
 
	// Setup for interrupt input on PA0 (PCINT0)
 
	PCMSK0 |= (1 << PCINT0);	// Enable interrupt for PA0
 
	PCICR |= (1 << PCIE0);		// Enable ioc section PCIF0
 
	
0 comments (0 inline, 0 general)