Changeset - f6804d996c04
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ethanzonca@CL-SEC241-08.cedarville.edu - 12 years ago 2012-10-30 11:58:17
ethanzonca@CL-SEC241-08.cedarville.edu
AFSK is now (pretty much completely) up and running
1 file changed with 5 insertions and 5 deletions:
0 comments (0 inline, 0 general)
master/master/lib/afsk.c
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@@ -77,66 +77,66 @@ void afsk_setup() {
 
  // OC2A (arduino pin 11) stays in normal port operation:
 
  // COM2B1=1, COM2B0=0, COM2A1=0, COM2A0=0
 
  TCCR2A = (TCCR2A | _BV(COM2B1)) & ~(_BV(COM2B0) | _BV(COM2A1) | _BV(COM2A0));
 

	
 
  // No prescaler (p.162)
 
  TCCR2B = (TCCR2B & ~(_BV(CS22) | _BV(CS21))) | _BV(CS20);
 
    
 
  // Enable interrupt when TCNT2 reaches TOP (0xFF) (p.151, 163)
 
	//TIMSK2 |= _BV(TOIE2);
 
	TIMSK2 |= 0b00000001;
 

	
 
	// Initialize PORTA
 
	DDRA = 0xff;
 
	PORTA = 0x00;
 
	
 
	DDRD = 0xff;
 
	PORTD = 0xff;
 
	
 
	// todo: init radio, maybe in main
 
	
 
	sei();
 
}
 

	
 
	
 

	
 
void afsk_test() {	
 
	uint8_t flap[32] = "somethingawesomesomethingawesome";
 
	afsk_send(flap, 32);
 
	uint8_t flap[26] = {"abcdefghijklmnopqrstuvwxyz"};
 
	afsk_send(flap, sizeof(flap)*8);
 
	afsk_start();
 
	while(afsk_busy());
 
	_delay_ms(500);
 
}
 

	
 

	
 

	
 

	
 
// constants
 
#define MODEM_CLOCK_RATE F_CPU
 
#define PLAYBACK_RATE MODEM_CLOCK_RATE / 256  // Fast PWM
 

	
 
#define BAUD_RATE 1200
 
//#define SAMPLES_PER_BAUD PLAYBACK_RATE / BAUD_RATE // = 36
 
//#define SAMPLES_PER_BAUD 36
 
#define SAMPLES_PER_BAUD 36
 

	
 

	
 
// phase offset of 1800 gives ~1900 Hz
 
// phase offset of 3300 gives ~2200 Hz
 
#define PHASE_DELTA_1200 1800
 
#define PHASE_DELTA_2200 2200
 

	
 
// Module globals
 
volatile unsigned char current_byte;
 
volatile unsigned char current_sample_in_baud;    // 1 bit = SAMPLES_PER_BAUD samples
 
volatile bool go = false;                 
 

	
 
volatile unsigned int packet_pos;                 // Next bit to be sent out
 

	
 

	
 
volatile unsigned int afsk_packet_size = 10;
 
volatile const uint8_t *afsk_packet;
 

	
 

	
 
void afsk_send(const uint8_t *buffer, int len)
 
{
 
	afsk_packet_size = len;
 
	afsk_packet = buffer;
 
@@ -184,54 +184,54 @@ ISR(TIMER2_OVF_vect)
 
			afsk_ptt_off();    // Release PTT
 
			return; // done
 
		}
 

	
 
		// If sent SAMPLES_PER_BAUD already, go to the next bit
 
		if (current_sample_in_baud == 0) {    // Load up next bit
 
			if ((packet_pos & 7) == 0) {          // Load up next byte
 
				current_byte = afsk_packet[packet_pos >> 3];
 
			}				
 
			else {
 
				current_byte = current_byte / 2;  // ">>1" forces int conversion
 
			}			
 
			if ((current_byte & 1) == 0) {
 
				// Toggle tone (1200 <> 2200)
 
				phasedelta ^= (PHASE_DELTA_1200 ^ PHASE_DELTA_2200);
 
			}
 
		}
 
	
 
		phase += phasedelta;
 
		uint8_t s = afsk_read_sample((phase >> 7) & (TABLE_SIZE - 1));
 
		afsk_output_sample(s);
 

	
 
		if(++current_sample_in_baud == SAMPLES_PER_BAUD) {
 
			// sounds fun when this is commented out... but why??!?!
 
			//current_sample_in_baud = 0;
 
			current_sample_in_baud = 0;
 
			packet_pos++;
 
		}
 
		
 
	}
 
}	
 

	
 
void afsk_output_sample(uint8_t s) {
 
	OCR2B = s;
 
}
 

	
 
void afsk_timer_start()
 
{
 
	// Clear the overflow flag, so that the interrupt doesn't go off
 
	// immediately and overrun the next one (p.163).
 
	TIFR2 |= _BV(TOV2);       // Yeah, writing a 1 clears the flag.
 

	
 
	// Enable interrupt when TCNT2 reaches TOP (0xFF) (p.151, 163)
 
	TIMSK2 |= _BV(TOIE2);
 
}
 

	
 
void afsk_timer_stop()
 
{
 
	// Resting duty cycle
 
	// Output 0v (could be 255/2, which is 0v after coupling... doesn't really matter)
 
	OCR2B = 0x00;
 
	OCR2B = 0x80;
 

	
 
	// Disable playback interrupt
 
	TIMSK2 &= ~_BV(TOIE2);
 
}
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