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Location: seniordesign-hardware/master/master.pro - annotation
5d648cd99878
1.0 KiB
text/x-prolog
Fixed Transformer in SrDes Lib
129dd427e0a6 129dd427e0a6 0c9d177b12cb 129dd427e0a6 0c9d177b12cb 0c9d177b12cb 0c9d177b12cb 129dd427e0a6 0c9d177b12cb 0c9d177b12cb 129dd427e0a6 0c9d177b12cb 129dd427e0a6 129dd427e0a6 129dd427e0a6 0c9d177b12cb 0c9d177b12cb 0c9d177b12cb 0c9d177b12cb 129dd427e0a6 0c9d177b12cb 0c9d177b12cb 0c9d177b12cb 129dd427e0a6 0c9d177b12cb | EAGLE AutoRouter Statistics:
Job : C:/Users/Ethan Zonca/Documents/eagle/seniordesign-hardware/master/master.brd
Start at : 22:17:54 (10/18/2012)
End at : 22:17:56 (10/18/2012)
Elapsed time : 00:00:02
Signals : 67 RoutingGrid: 50 mil Layers: 2
Connections : 197 predefined: 4 ( 0 Vias )
Router memory : 13456
Passname : Busses Route Optimize1 Optimize2 Optimize3 Optimize4
Time per pass : 00:00:00 00:00:01 00:00:00 00:00:00 00:00:01 00:00:00
Number of Ripups : 0 3 0 0 0 0
max. Level : 0 4 0 0 0 0
max. Total : 0 52 0 0 0 0
Routed : 15 104 104 104 104 104
Vias : 0 93 42 34 31 29
Resolution : 9.6 % 54.8 % 54.8 % 54.8 % 54.8 % 54.8 %
Final : 54.8% finished
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