# HG changeset patch
# User mkroening@CL-SEC241-07.cedarville.edu
# Date 2012-10-25 15:03:21
# Node ID b0ea23b69aa5739dbca7a9e012e7bdc236f02e7b
# Parent  baf819804c80ac2ae3c3ddf7864ed84463bcbef6

Reviewed and minor changes -KR MKr

diff --git a/master/master.brd b/master/master.brd
--- a/master/master.brd
+++ b/master/master.brd
@@ -1813,10 +1813,9 @@ design rules under a new name.</descript
 <wire x1="41.85" y1="33.655" x2="40.005" y2="33.655" width="0.4064" layer="1"/>
 <wire x1="40.005" y1="33.655" x2="39.37" y2="33.02" width="0.4064" layer="1"/>
 <contactref element="R29" pad="2"/>
-<contactref element="Q7" pad="3"/>
-<wire x1="87.63" y1="36.66" x2="87.63" y2="39.37" width="0.8128" layer="1"/>
 <wire x1="85.09" y1="36.41" x2="87.63" y2="36.41" width="0.4064" layer="1"/>
-<wire x1="87.63" y1="36.41" x2="87.63" y2="36.66" width="0.4064" layer="1"/>
+<contactref element="Q7" pad="2"/>
+<wire x1="88.58" y1="34.56" x2="87.63" y2="36.41" width="0" layer="19" extent="1-1"/>
 <wire x1="43.55" y1="30.685" x2="85.09" y2="36.41" width="0" layer="19" extent="1-1"/>
 <wire x1="30.71" y1="48.875" x2="40.005" y2="33.655" width="0" layer="19" extent="1-1"/>
 <wire x1="23.81" y1="43.35" x2="30.71" y2="48.875" width="0" layer="19" extent="1-1"/>
@@ -1972,12 +1971,6 @@ design rules under a new name.</descript
 <wire x1="85.09" y1="34.71" x2="82.55" y2="34.71" width="0.4064" layer="1"/>
 <wire x1="82.55" y1="34.71" x2="82.55" y2="34.46" width="0.4064" layer="1"/>
 </signal>
-<signal name="N$37">
-<contactref element="Q7" pad="2"/>
-<contactref element="R27" pad="1"/>
-<wire x1="86.62" y1="31.75" x2="88.58" y2="31.75" width="0.8128" layer="1"/>
-<wire x1="88.58" y1="31.75" x2="88.58" y2="34.56" width="0.8128" layer="1"/>
-</signal>
 <signal name="N$38">
 <contactref element="Q9" pad="B"/>
 <contactref element="10K" pad="1"/>
@@ -2032,6 +2025,11 @@ design rules under a new name.</descript
 <contactref element="IC1" pad="40"/>
 <wire x1="15.7525" y1="8.985" x2="31.03" y2="15.71" width="0" layer="19" extent="1-16"/>
 </signal>
+<signal name="N$11">
+<contactref element="Q7" pad="3"/>
+<contactref element="R27" pad="1"/>
+<wire x1="86.62" y1="31.75" x2="87.63" y2="36.66" width="0" layer="19" extent="1-1"/>
+</signal>
 </signals>
 </board>
 </drawing>
diff --git a/master/master.sch b/master/master.sch
--- a/master/master.sch
+++ b/master/master.sch
@@ -5553,7 +5553,7 @@ There are 2 variants that must be carefu
 <sheet>
 <plain>
 <text x="208.026" y="5.842" size="5.08" layer="94" font="vector">Master Motherboard</text>
-<text x="53.34" y="246.38" size="5.08" layer="94" font="vector">UART</text>
+<text x="50.8" y="248.92" size="5.08" layer="94" font="vector">UART</text>
 <wire x1="121.92" y1="256.54" x2="121.92" y2="194.818" width="0.3048" layer="94"/>
 <wire x1="121.92" y1="194.818" x2="121.92" y2="144.78" width="0.3048" layer="94"/>
 <wire x1="121.92" y1="127" x2="3.302" y2="127" width="0.3048" layer="94"/>
@@ -5620,7 +5620,7 @@ are free for leds</text>
 <text x="71.12" y="200.66" size="1.778" layer="91">3.3V TOLERANT!</text>
 <text x="0" y="220.98" size="1.778" layer="91">Place by P1</text>
 <text x="68.58" y="7.62" size="1.778" layer="91">FB/Inductor trace must be short, low L (plane)</text>
-<text x="307.34" y="172.72" size="5.08" layer="91" ratio="19" rot="R90">TODO</text>
+<text x="302.26" y="175.26" size="5.08" layer="91" ratio="19" rot="R90">Review</text>
 <text x="353.06" y="208.28" size="1.778" layer="91">Optional</text>
 <text x="281.94" y="35.56" size="1.778" layer="91">Max drive:
   40mA / channel
@@ -5633,6 +5633,7 @@ Maybe use bigger R's</text>
 <text x="50.8" y="119.38" size="5.08" layer="94" font="vector">SPI</text>
 <text x="10.16" y="81.28" size="1.778" layer="91">CLOSE TO CARD</text>
 <text x="55.88" y="86.36" size="1.778" layer="91">spare 4.7k</text>
+<text x="350.52" y="205.74" size="1.778" layer="91">Consider putting solder jumpers on this so we can use these pins for other things</text>
 </plain>
 <instances>
 <instance part="U$2" gate="G$1" x="60.96" y="226.06"/>
@@ -5803,7 +5804,7 @@ Maybe use bigger R's</text>
 <instance part="U$12" gate="G$1" x="132.08" y="129.54"/>
 <instance part="GND39" gate="1" x="299.72" y="167.64"/>
 <instance part="R27" gate="G$1" x="304.8" y="180.34" rot="R270"/>
-<instance part="Q7" gate="G$1" x="304.8" y="193.04"/>
+<instance part="Q7" gate="G$1" x="304.8" y="193.04" rot="MR180"/>
 <instance part="Q9" gate="G$1" x="292.1" y="185.42"/>
 <instance part="R29" gate="G$1" x="294.64" y="200.66" rot="R90"/>
 <instance part="10K" gate="G$1" x="279.4" y="185.42" rot="R180"/>
@@ -6790,11 +6791,11 @@ Maybe use bigger R's</text>
 <segment>
 <pinref part="R29" gate="G$1" pin="2"/>
 <wire x1="294.64" y1="205.74" x2="294.64" y2="208.28" width="0.1524" layer="91"/>
-<pinref part="Q7" gate="G$1" pin="D"/>
 <wire x1="294.64" y1="208.28" x2="304.8" y2="208.28" width="0.1524" layer="91"/>
-<wire x1="304.8" y1="208.28" x2="304.8" y2="198.12" width="0.1524" layer="91"/>
+<label x="309.88" y="208.28" size="1.778" layer="95"/>
+<pinref part="Q7" gate="G$1" pin="S"/>
 <wire x1="304.8" y1="208.28" x2="314.96" y2="208.28" width="0.1524" layer="91"/>
-<label x="309.88" y="208.28" size="1.778" layer="95"/>
+<wire x1="304.8" y1="198.12" x2="304.8" y2="208.28" width="0.1524" layer="91"/>
 <junction x="304.8" y="208.28"/>
 </segment>
 </net>
@@ -7005,13 +7006,6 @@ Maybe use bigger R's</text>
 <junction x="294.64" y="193.04"/>
 </segment>
 </net>
-<net name="N$37" class="0">
-<segment>
-<pinref part="Q7" gate="G$1" pin="S"/>
-<pinref part="R27" gate="G$1" pin="1"/>
-<wire x1="304.8" y1="185.42" x2="304.8" y2="187.96" width="0.1524" layer="91"/>
-</segment>
-</net>
 <net name="N$38" class="0">
 <segment>
 <pinref part="Q9" gate="G$1" pin="B"/>
@@ -7085,6 +7079,13 @@ Maybe use bigger R's</text>
 <label x="330.2" y="111.76" size="1.778" layer="95"/>
 </segment>
 </net>
+<net name="N$11" class="0">
+<segment>
+<pinref part="Q7" gate="G$1" pin="D"/>
+<pinref part="R27" gate="G$1" pin="1"/>
+<wire x1="304.8" y1="187.96" x2="304.8" y2="185.42" width="0.1524" layer="91"/>
+</segment>
+</net>
 </nets>
 </sheet>
 </sheets>