@@ -21576,18 +21576,18 @@ Please make sure your boards conform to
<wire x1="22.6568" y1="33.2232" x2="22.6568" y2="35.2552" width="0.6096" layer="1"/>
<contactref element="C8" pad="-"/>
<contactref element="C9" pad="-"/>
<via x="31.115" y="20.6375" extent="1-16" drill="0.254"/>
<via x="31.4325" y="20.6375" extent="1-16" drill="0.254"/>
<via x="25.4" y="20.6375" extent="1-16" drill="0.254"/>
<via x="13.97" y="19.05" extent="1-16" drill="0.254"/>
<via x="13.0175" y="18.7325" extent="1-16" drill="0.254"/>
<via x="18.0975" y="30.1625" extent="1-16" drill="0.254"/>
<via x="31.4325" y="13.0175" extent="1-16" drill="0.254"/>
<via x="21.9075" y="11.43" extent="1-16" drill="0.254"/>
<via x="20.6375" y="21.2725" extent="1-16" drill="0.254"/>
<via x="17.78" y="23.8125" extent="1-16" drill="0.254"/>
<via x="21.9075" y="11.7475" extent="1-16" drill="0.254"/>
<via x="20.6375" y="20.6375" extent="1-16" drill="0.254"/>
<via x="18.0975" y="23.8125" extent="1-16" drill="0.254"/>
<contactref element="C2" pad="-"/>
<via x="5.3975" y="19.05" extent="1-16" drill="0.254"/>
<via x="6.35" y="18.7325" extent="1-16" drill="0.254"/>
<via x="2.54" y="18.7325" extent="1-16" drill="0.254"/>
<via x="2.8575" y="36.83" extent="1-16" drill="0.254"/>
<via x="2.8575" y="36.5125" extent="1-16" drill="0.254"/>
<contactref element="C10" pad="2"/>
</signal>
<signal name="VBAT">
@@ -341,93 +341,11 @@ UsedLibrary="C:/Program Files (x86)/EAGL
UsedLibrary="C:/Program Files (x86)/EAGLE-6.3.0/lbr/zilog.lbr"
[Win_1]
Type="Board Editor"
Loc="1272 66 1871 465"
State=1
Number=2
File="C:/Users/kripperger/Documents/eagle/seniordesign-hardware/slave-daughter/slave-daughter-gieger2.brd"
View="9.86107 8.42611 40.6008 36.9301"
WireWidths=" 0 0.254 0.3048 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0.4064"
PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
PadDrills=" 0.5 0.6 0.7 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 2 2.2 2.8 3.2 0.8"
ViaDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
ViaDrills=" 0.5 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 2 2.2 2.8 3.2 0.6"
HoleDrills=" 0.5 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 2 2.2 2.8 3.2 0.6"
TextSizes=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.778"
PolygonSpacings=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.27"
PolygonIsolates=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
MiterRadiuss=" 0.254 0.3175 0.635 1.27 2.54 1 2 2.5 5 7.5 10 0"
SmdSizes=" 0.3048 0.1524 0.4064 0.2032 0.6096 0.3048 0.8128 0.4064 1.016 0.508 1.27 0.6604 1.4224 0.7112 1.6764 0.8128 1.778 0.9144 1.9304 0.9652 2.1844 1.0668 2.54 1.27 3.81 1.9304 5.08 2.54 6.4516 3.2512 1.27 0.635"
WireBend=0
WireBendSet=0
WireCap=1
MiterStyle=0
PadShape=0
ViaShape=0
PolygonPour=0
PolygonRank=1
PolygonThermals=1
PolygonOrphans=0
TextRatio=8
PinDirection=3
PinFunction=0
PinLength=2
PinVisible=3
SwapLevel=0
ArcDirection=0
AddLevel=2
PadsSameType=0
Layer=16
[Win_2]
Type="Schematic Editor"
Loc="-8 -8 591 391"
State=3
Number=1
File="C:/Users/kripperger/Documents/eagle/seniordesign-hardware/slave-daughter/slave-daughter-gieger2.sch"
View="-3.12297 0.458266 177.166 134.886"
WireWidths=" 0 0.3048 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0.4064 0.1524"
WireBendSet=31
PolygonRank=0
Layer=91
Views=" 1: -3.12297 0.458266 177.166 134.886"
Sheet=1
[Win_3]
Type="Control Panel"
Loc="440 475 1039 874"
Loc="406 254 1005 653"
State=2
Number=0
[Desktop]
Screen="3200 1154"
Window="Win_1"
Window="Win_2"
Window="Win_3"
Status change: