diff --git a/zoncoffee.sch b/zoncoffee.sch
--- a/zoncoffee.sch
+++ b/zoncoffee.sch
@@ -1,6 +1,6 @@
 <?xml version="1.0" encoding="utf-8"?>
 <!DOCTYPE eagle SYSTEM "eagle.dtd">
-<eagle version="6.5.0">
+<eagle version="7.1.0">
 <drawing>
 <settings>
 <setting alwaysvectorfont="yes"/>
@@ -2284,125 +2284,6 @@ 5V - VREG-00823</description>
 </library>
 <library name="Protofusion">
 <packages>
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@@ -2598,49 +2479,100 @@ 5V - VREG-00823</description>
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 <text x="-1.27" y="-6.35" size="1.27" layer="27">&gt;VALUE</text>
 </package>
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+<rectangle x1="-4.185" y1="-1.7" x2="-3.815" y2="-0.7" layer="51" rot="R270"/>
+<rectangle x1="-4.185" y1="-0.9" x2="-3.815" y2="0.1" layer="51" rot="R270"/>
+<rectangle x1="-4.185" y1="-0.1" x2="-3.815" y2="0.9" layer="51" rot="R270"/>
+<rectangle x1="-4.185" y1="0.7" x2="-3.815" y2="1.7" layer="51" rot="R270"/>
+<rectangle x1="-2.985" y1="-4.5" x2="-2.615" y2="-3.5" layer="51"/>
+<rectangle x1="-2.185" y1="-4.5" x2="-1.815" y2="-3.5" layer="51"/>
+<rectangle x1="2.615" y1="-4.5" x2="2.985" y2="-3.5" layer="51"/>
+<rectangle x1="1.815" y1="-4.5" x2="2.185" y2="-3.5" layer="51"/>
+<rectangle x1="1.015" y1="-4.5" x2="1.385" y2="-3.5" layer="51"/>
+<rectangle x1="0.215" y1="-4.5" x2="0.585" y2="-3.5" layer="51"/>
+<rectangle x1="-0.585" y1="-4.5" x2="-0.215" y2="-3.5" layer="51"/>
+<rectangle x1="-1.385" y1="-4.5" x2="-1.015" y2="-3.5" layer="51"/>
+<rectangle x1="3.815" y1="-3.3" x2="4.185" y2="-2.3" layer="51" rot="R90"/>
+<rectangle x1="3.815" y1="-2.5" x2="4.185" y2="-1.5" layer="51" rot="R90"/>
+<rectangle x1="3.815" y1="2.3" x2="4.185" y2="3.3" layer="51" rot="R90"/>
+<rectangle x1="3.815" y1="1.5" x2="4.185" y2="2.5" layer="51" rot="R90"/>
+<rectangle x1="3.815" y1="0.7" x2="4.185" y2="1.7" layer="51" rot="R90"/>
+<rectangle x1="3.815" y1="-0.1" x2="4.185" y2="0.9" layer="51" rot="R90"/>
+<rectangle x1="3.815" y1="-0.9" x2="4.185" y2="0.1" layer="51" rot="R90"/>
+<rectangle x1="3.815" y1="-1.7" x2="4.185" y2="-0.7" layer="51" rot="R90"/>
+<rectangle x1="2.615" y1="3.5" x2="2.985" y2="4.5" layer="51" rot="R180"/>
+<rectangle x1="1.815" y1="3.5" x2="2.185" y2="4.5" layer="51" rot="R180"/>
+<rectangle x1="-2.985" y1="3.5" x2="-2.615" y2="4.5" layer="51" rot="R180"/>
+<rectangle x1="-2.185" y1="3.5" x2="-1.815" y2="4.5" layer="51" rot="R180"/>
+<rectangle x1="-1.385" y1="3.5" x2="-1.015" y2="4.5" layer="51" rot="R180"/>
+<rectangle x1="-0.585" y1="3.5" x2="-0.215" y2="4.5" layer="51" rot="R180"/>
+<rectangle x1="0.215" y1="3.5" x2="0.585" y2="4.5" layer="51" rot="R180"/>
+<rectangle x1="1.015" y1="3.5" x2="1.385" y2="4.5" layer="51" rot="R180"/>
+</package>
 </packages>
 <symbols>
-<symbol name="STM32F042K">
-<wire x1="-35.56" y1="43.18" x2="40.64" y2="43.18" width="0.254" layer="94"/>
-<wire x1="40.64" y1="43.18" x2="40.64" y2="-5.08" width="0.254" layer="94"/>
-<wire x1="40.64" y1="-5.08" x2="-35.56" y2="-5.08" width="0.254" layer="94"/>
-<text x="-35.56" y="45.72" size="2.54" layer="95">&gt;NAME</text>
-<text x="-35.56" y="-10.16" size="2.54" layer="96">&gt;VALUE</text>
-<pin name="VDD" x="-40.64" y="38.1" length="middle"/>
-<pin name="PF0/I2C1_SDA" x="-40.64" y="35.56" length="middle"/>
-<pin name="PF1/I2C1_SCL" x="-40.64" y="33.02" length="middle"/>
-<pin name="NRST" x="-40.64" y="30.48" length="middle"/>
-<pin name="VDDA" x="-40.64" y="27.94" length="middle"/>
-<pin name="PA0/ADC0" x="-40.64" y="25.4" length="middle"/>
-<pin name="PA1/ADC1" x="-40.64" y="22.86" length="middle"/>
-<pin name="PA2/ADC2/USART2_TX" x="-40.64" y="20.32" length="middle"/>
-<pin name="PA3/ADC3/USART2_RX" x="-40.64" y="17.78" length="middle"/>
-<pin name="PA4/ADC4" x="-40.64" y="15.24" length="middle"/>
-<pin name="PA5/ADC5/SPI1_SCK" x="-40.64" y="12.7" length="middle"/>
-<pin name="PA6/ADC6/SPI1_MISO" x="-40.64" y="10.16" length="middle"/>
-<pin name="PA7/ADC7/SPI1_MOSI" x="-40.64" y="7.62" length="middle"/>
-<pin name="PB0/ADC8" x="-40.64" y="5.08" length="middle"/>
-<pin name="PB1/ADC9" x="-40.64" y="2.54" length="middle"/>
-<pin name="PB2" x="-40.64" y="0" length="middle"/>
-<pin name="VDDIO2" x="45.72" y="0" length="middle" rot="R180"/>
-<pin name="PA8" x="45.72" y="2.54" length="middle" rot="R180"/>
-<pin name="USART1_TX/I2C1_SCL/PA9" x="45.72" y="5.08" length="middle" rot="R180"/>
-<pin name="USART1_RX/I2C1_SDA/PA10" x="45.72" y="7.62" length="middle" rot="R180"/>
-<pin name="CAN_RX/I2C1_SCL/USB_DM/PA11" x="45.72" y="10.16" length="middle" rot="R180"/>
-<pin name="CAN_TX/I2C1_SDA/USB_DP/PA12" x="45.72" y="12.7" length="middle" rot="R180"/>
-<pin name="SWDIO/PA13" x="45.72" y="15.24" length="middle" rot="R180"/>
-<pin name="USART2_TX/SWCLK/PA14" x="45.72" y="17.78" length="middle" rot="R180"/>
-<pin name="USART2_RX/PA15" x="45.72" y="20.32" length="middle" rot="R180"/>
-<pin name="SPI1_SCK/PB3" x="45.72" y="22.86" length="middle" rot="R180"/>
-<pin name="SPI1_MISO/PB4" x="45.72" y="25.4" length="middle" rot="R180"/>
-<pin name="SPI1_MOSI/PB5" x="45.72" y="27.94" length="middle" rot="R180"/>
-<pin name="I2C1_SCL/USART1_TX/PB6" x="45.72" y="30.48" length="middle" rot="R180"/>
-<pin name="I2C1_SDA/USART1_RX/PB7" x="45.72" y="33.02" length="middle" rot="R180"/>
-<pin name="BOOT0-PF11" x="45.72" y="35.56" length="middle" rot="R180"/>
-<pin name="I2C1_SCL/CAN_RX/PB8" x="45.72" y="38.1" length="middle" rot="R180"/>
-<wire x1="-35.56" y1="43.18" x2="-35.56" y2="-5.08" width="0.254" layer="94"/>
-<pin name="GND" x="0" y="-10.16" length="middle" rot="R90"/>
-</symbol>
 <symbol name="C">
 <wire x1="0" y1="0" x2="0" y2="1.016" width="0.1524" layer="94"/>
 <wire x1="0" y1="2.54" x2="0" y2="1.778" width="0.1524" layer="94"/>
@@ -2664,55 +2596,47 @@ 5V - VREG-00823</description>
 <text x="0" y="-10.16" size="1.778" layer="95" rot="MR180">&gt;VALUE</text>
 <rectangle x1="0" y1="-8.89" x2="1.27" y2="6.35" layer="94"/>
 </symbol>
+<symbol name="STM32F042K-T">
+<wire x1="-40.64" y1="22.86" x2="35.56" y2="22.86" width="0.254" layer="94"/>
+<wire x1="35.56" y1="22.86" x2="35.56" y2="-25.4" width="0.254" layer="94"/>
+<wire x1="35.56" y1="-25.4" x2="-40.64" y2="-25.4" width="0.254" layer="94"/>
+<text x="-40.64" y="25.4" size="2.54" layer="95">&gt;NAME</text>
+<text x="-40.64" y="-30.48" size="2.54" layer="96">&gt;VALUE</text>
+<pin name="VDD" x="-45.72" y="17.78" length="middle"/>
+<pin name="PF0/I2C1_SDA" x="-45.72" y="15.24" length="middle"/>
+<pin name="PF1/I2C1_SCL" x="-45.72" y="12.7" length="middle"/>
+<pin name="NRST" x="-45.72" y="10.16" length="middle"/>
+<pin name="VDDA" x="-45.72" y="7.62" length="middle"/>
+<pin name="PA0/ADC0" x="-45.72" y="5.08" length="middle"/>
+<pin name="PA1/ADC1" x="-45.72" y="2.54" length="middle"/>
+<pin name="PA2/ADC2/USART2_TX" x="-45.72" y="0" length="middle"/>
+<pin name="PA3/ADC3/USART2_RX" x="-45.72" y="-2.54" length="middle"/>
+<pin name="PA4/ADC4" x="-45.72" y="-5.08" length="middle"/>
+<pin name="PA5/ADC5/SPI1_SCK" x="-45.72" y="-7.62" length="middle"/>
+<pin name="PA6/ADC6/SPI1_MISO" x="-45.72" y="-10.16" length="middle"/>
+<pin name="PA7/ADC7/SPI1_MOSI" x="-45.72" y="-12.7" length="middle"/>
+<pin name="PB0/ADC8" x="-45.72" y="-15.24" length="middle"/>
+<pin name="PB1/ADC9" x="-45.72" y="-17.78" length="middle"/>
+<pin name="VDDIO2" x="40.64" y="-20.32" length="middle" rot="R180"/>
+<pin name="PA8" x="40.64" y="-17.78" length="middle" rot="R180"/>
+<pin name="USART1_TX/I2C1_SCL/PA9" x="40.64" y="-15.24" length="middle" rot="R180"/>
+<pin name="USART1_RX/I2C1_SDA/PA10" x="40.64" y="-12.7" length="middle" rot="R180"/>
+<pin name="CAN_RX/I2C1_SCL/USB_DM/PA11" x="40.64" y="-10.16" length="middle" rot="R180"/>
+<pin name="CAN_TX/I2C1_SDA/USB_DP/PA12" x="40.64" y="-7.62" length="middle" rot="R180"/>
+<pin name="SWDIO/PA13" x="40.64" y="-5.08" length="middle" rot="R180"/>
+<pin name="USART2_TX/SWCLK/PA14" x="40.64" y="-2.54" length="middle" rot="R180"/>
+<pin name="USART2_RX/PA15" x="40.64" y="0" length="middle" rot="R180"/>
+<pin name="SPI1_SCK/PB3" x="40.64" y="2.54" length="middle" rot="R180"/>
+<pin name="SPI1_MISO/PB4" x="40.64" y="5.08" length="middle" rot="R180"/>
+<pin name="SPI1_MOSI/PB5" x="40.64" y="7.62" length="middle" rot="R180"/>
+<pin name="I2C1_SCL/USART1_TX/PB6" x="40.64" y="10.16" length="middle" rot="R180"/>
+<pin name="I2C1_SDA/USART1_RX/PB7" x="40.64" y="12.7" length="middle" rot="R180"/>
+<pin name="BOOT0/I2C1_SCL/CAN_RX/PB8" x="40.64" y="17.78" length="middle" rot="R180"/>
+<wire x1="-40.64" y1="22.86" x2="-40.64" y2="-25.4" width="0.254" layer="94"/>
+<pin name="GND" x="-5.08" y="-30.48" length="middle" rot="R90"/>
+</symbol>
 </symbols>
 <devicesets>
-<deviceset name="STM32F042K">
-<gates>
-<gate name="G$1" symbol="STM32F042K" x="2.54" y="0"/>
-</gates>
-<devices>
-<device name="" package="UFQFPN32">
-<connects>
-<connect gate="G$1" pin="BOOT0-PF11" pad="31"/>
-<connect gate="G$1" pin="CAN_RX/I2C1_SCL/USB_DM/PA11" pad="21"/>
-<connect gate="G$1" pin="CAN_TX/I2C1_SDA/USB_DP/PA12" pad="22"/>
-<connect gate="G$1" pin="GND" pad="EXP"/>
-<connect gate="G$1" pin="I2C1_SCL/CAN_RX/PB8" pad="32"/>
-<connect gate="G$1" pin="I2C1_SCL/USART1_TX/PB6" pad="29"/>
-<connect gate="G$1" pin="I2C1_SDA/USART1_RX/PB7" pad="30"/>
-<connect gate="G$1" pin="NRST" pad="4"/>
-<connect gate="G$1" pin="PA0/ADC0" pad="6"/>
-<connect gate="G$1" pin="PA1/ADC1" pad="7"/>
-<connect gate="G$1" pin="PA2/ADC2/USART2_TX" pad="8"/>
-<connect gate="G$1" pin="PA3/ADC3/USART2_RX" pad="9"/>
-<connect gate="G$1" pin="PA4/ADC4" pad="10"/>
-<connect gate="G$1" pin="PA5/ADC5/SPI1_SCK" pad="11"/>
-<connect gate="G$1" pin="PA6/ADC6/SPI1_MISO" pad="12"/>
-<connect gate="G$1" pin="PA7/ADC7/SPI1_MOSI" pad="13"/>
-<connect gate="G$1" pin="PA8" pad="18"/>
-<connect gate="G$1" pin="PB0/ADC8" pad="14"/>
-<connect gate="G$1" pin="PB1/ADC9" pad="15"/>
-<connect gate="G$1" pin="PB2" pad="16"/>
-<connect gate="G$1" pin="PF0/I2C1_SDA" pad="2"/>
-<connect gate="G$1" pin="PF1/I2C1_SCL" pad="3"/>
-<connect gate="G$1" pin="SPI1_MISO/PB4" pad="27"/>
-<connect gate="G$1" pin="SPI1_MOSI/PB5" pad="28"/>
-<connect gate="G$1" pin="SPI1_SCK/PB3" pad="26"/>
-<connect gate="G$1" pin="SWDIO/PA13" pad="23"/>
-<connect gate="G$1" pin="USART1_RX/I2C1_SDA/PA10" pad="20"/>
-<connect gate="G$1" pin="USART1_TX/I2C1_SCL/PA9" pad="19"/>
-<connect gate="G$1" pin="USART2_RX/PA15" pad="25"/>
-<connect gate="G$1" pin="USART2_TX/SWCLK/PA14" pad="24"/>
-<connect gate="G$1" pin="VDD" pad="1"/>
-<connect gate="G$1" pin="VDDA" pad="5"/>
-<connect gate="G$1" pin="VDDIO2" pad="17"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-</devices>
-</deviceset>
 <deviceset name="CAP-ARRAY">
 <gates>
 <gate name="1" symbol="C" x="-12.7" y="0"/>
@@ -2837,6 +2761,51 @@ 5V - VREG-00823</description>
 </device>
 </devices>
 </deviceset>
+<deviceset name="STM32F042K-T">
+<gates>
+<gate name="G$1" symbol="STM32F042K-T" x="5.08" y="0"/>
+</gates>
+<devices>
+<device name="" package="LQFP32">
+<connects>
+<connect gate="G$1" pin="BOOT0/I2C1_SCL/CAN_RX/PB8" pad="31"/>
+<connect gate="G$1" pin="CAN_RX/I2C1_SCL/USB_DM/PA11" pad="21"/>
+<connect gate="G$1" pin="CAN_TX/I2C1_SDA/USB_DP/PA12" pad="22"/>
+<connect gate="G$1" pin="GND" pad="16 32"/>
+<connect gate="G$1" pin="I2C1_SCL/USART1_TX/PB6" pad="29"/>
+<connect gate="G$1" pin="I2C1_SDA/USART1_RX/PB7" pad="30"/>
+<connect gate="G$1" pin="NRST" pad="4"/>
+<connect gate="G$1" pin="PA0/ADC0" pad="6"/>
+<connect gate="G$1" pin="PA1/ADC1" pad="7"/>
+<connect gate="G$1" pin="PA2/ADC2/USART2_TX" pad="8"/>
+<connect gate="G$1" pin="PA3/ADC3/USART2_RX" pad="9"/>
+<connect gate="G$1" pin="PA4/ADC4" pad="10"/>
+<connect gate="G$1" pin="PA5/ADC5/SPI1_SCK" pad="11"/>
+<connect gate="G$1" pin="PA6/ADC6/SPI1_MISO" pad="12"/>
+<connect gate="G$1" pin="PA7/ADC7/SPI1_MOSI" pad="13"/>
+<connect gate="G$1" pin="PA8" pad="18"/>
+<connect gate="G$1" pin="PB0/ADC8" pad="14"/>
+<connect gate="G$1" pin="PB1/ADC9" pad="15"/>
+<connect gate="G$1" pin="PF0/I2C1_SDA" pad="2"/>
+<connect gate="G$1" pin="PF1/I2C1_SCL" pad="3"/>
+<connect gate="G$1" pin="SPI1_MISO/PB4" pad="27"/>
+<connect gate="G$1" pin="SPI1_MOSI/PB5" pad="28"/>
+<connect gate="G$1" pin="SPI1_SCK/PB3" pad="26"/>
+<connect gate="G$1" pin="SWDIO/PA13" pad="23"/>
+<connect gate="G$1" pin="USART1_RX/I2C1_SDA/PA10" pad="20"/>
+<connect gate="G$1" pin="USART1_TX/I2C1_SCL/PA9" pad="19"/>
+<connect gate="G$1" pin="USART2_RX/PA15" pad="25"/>
+<connect gate="G$1" pin="USART2_TX/SWCLK/PA14" pad="24"/>
+<connect gate="G$1" pin="VDD" pad="1"/>
+<connect gate="G$1" pin="VDDA" pad="5"/>
+<connect gate="G$1" pin="VDDIO2" pad="17"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
 </devicesets>
 </library>
 <library name="SparkFun-Aesthetics">
@@ -4091,7 +4060,6 @@ Standard 0603 ceramic capacitor, and 0.1
 <part name="GND8" library="SparkFun-Aesthetics" deviceset="GND" device=""/>
 <part name="FRAME1" library="SparkFun-Aesthetics" deviceset="FRAME-A4L" device=""/>
 <part name="LCD1" library="microbuilder" deviceset="DISP_OLED_UG-2832HSWEG04" device="WRAPAROUND" value="SSD1306-SPI"/>
-<part name="U1" library="Protofusion" deviceset="STM32F042K" device=""/>
 <part name="C2" library="SparkFun-Passives" deviceset="CAP" device="0402-CAP" value="0.1uF"/>
 <part name="C1" library="SparkFun-Passives" deviceset="CAP" device="0402-CAP" value="0.1uF"/>
 <part name="C6" library="SparkFun-Passives" deviceset="CAP" device="0402-CAP" value="0.1uF"/>
@@ -4112,6 +4080,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <part name="U$1" library="microbuilder" deviceset="GND" device=""/>
 <part name="SUPPLY2" library="SparkFun-Aesthetics" deviceset="3.3V" device=""/>
 <part name="C4" library="SparkFun-Passives" deviceset="CAP" device="0402-CAP" value="0.01uF"/>
+<part name="U$8" library="Protofusion" deviceset="STM32F042K-T" device=""/>
 </parts>
 <sheets>
 <sheet>
@@ -4157,7 +4126,6 @@ Standard 0603 ceramic capacitor, and 0.1
 <instance part="GND8" gate="1" x="182.88" y="55.88"/>
 <instance part="FRAME1" gate="G$1" x="5.08" y="5.08"/>
 <instance part="LCD1" gate="G$1" x="86.36" y="53.34"/>
-<instance part="U1" gate="G$1" x="106.68" y="124.46"/>
 <instance part="C2" gate="G$1" x="33.02" y="144.78"/>
 <instance part="C1" gate="G$1" x="20.32" y="152.4"/>
 <instance part="C6" gate="G$1" x="160.02" y="116.84"/>
@@ -4181,6 +4149,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <instance part="U$1" gate="G$1" x="223.52" y="152.4"/>
 <instance part="SUPPLY2" gate="G$1" x="223.52" y="167.64"/>
 <instance part="C4" gate="G$1" x="251.46" y="162.56" rot="R180"/>
+<instance part="U$8" gate="G$1" x="111.76" y="144.78"/>
 </instances>
 <busses>
 </busses>
@@ -4309,9 +4278,9 @@ Standard 0603 ceramic capacitor, and 0.1
 <pinref part="U$16" gate="G$1" pin="GND"/>
 </segment>
 <segment>
-<pinref part="U1" gate="G$1" pin="GND"/>
 <pinref part="U$18" gate="G$1" pin="GND"/>
 <wire x1="106.68" y1="111.76" x2="106.68" y2="114.3" width="0.1524" layer="91"/>
+<pinref part="U$8" gate="G$1" pin="GND"/>
 </segment>
 <segment>
 <pinref part="J1" gate="J" pin="GND"/>
@@ -4319,7 +4288,6 @@ Standard 0603 ceramic capacitor, and 0.1
 <label x="254" y="66.04" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
 <segment>
-<pinref part="U1" gate="G$1" pin="BOOT0-PF11"/>
 <wire x1="152.4" y1="160.02" x2="175.26" y2="160.02" width="0.1524" layer="91"/>
 <wire x1="175.26" y1="160.02" x2="175.26" y2="157.48" width="0.1524" layer="91"/>
 <pinref part="U$7" gate="G$1" pin="GND"/>
@@ -4385,30 +4353,30 @@ Standard 0603 ceramic capacitor, and 0.1
 <wire x1="269.24" y1="165.1" x2="269.24" y2="167.64" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<pinref part="U1" gate="G$1" pin="VDD"/>
 <pinref part="C1" gate="G$1" pin="1"/>
 <wire x1="66.04" y1="162.56" x2="20.32" y2="162.56" width="0.1524" layer="91"/>
 <wire x1="20.32" y1="162.56" x2="20.32" y2="157.48" width="0.1524" layer="91"/>
 <pinref part="SUPPLY11" gate="G$1" pin="3.3V"/>
 <wire x1="20.32" y1="165.1" x2="20.32" y2="162.56" width="0.1524" layer="91"/>
 <junction x="20.32" y="162.56"/>
+<pinref part="U$8" gate="G$1" pin="VDD"/>
 </segment>
 <segment>
-<pinref part="U1" gate="G$1" pin="VDDA"/>
 <pinref part="C2" gate="G$1" pin="1"/>
 <wire x1="66.04" y1="152.4" x2="33.02" y2="152.4" width="0.1524" layer="91"/>
 <wire x1="33.02" y1="152.4" x2="33.02" y2="149.86" width="0.1524" layer="91"/>
 <pinref part="SUPPLY12" gate="G$1" pin="3.3V"/>
 <wire x1="33.02" y1="154.94" x2="33.02" y2="152.4" width="0.1524" layer="91"/>
 <junction x="33.02" y="152.4"/>
+<pinref part="U$8" gate="G$1" pin="VDDA"/>
 </segment>
 <segment>
-<pinref part="U1" gate="G$1" pin="VDDIO2"/>
 <pinref part="C6" gate="G$1" pin="1"/>
 <wire x1="152.4" y1="124.46" x2="160.02" y2="124.46" width="0.1524" layer="91"/>
 <wire x1="160.02" y1="124.46" x2="160.02" y2="121.92" width="0.1524" layer="91"/>
 <pinref part="SUPPLY13" gate="G$1" pin="3.3V"/>
 <junction x="160.02" y="124.46"/>
+<pinref part="U$8" gate="G$1" pin="VDDIO2"/>
 </segment>
 <segment>
 <pinref part="U3" gate="G$1" pin="VCC"/>
@@ -4454,7 +4422,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <wire x1="154.94" y1="152.4" x2="152.4" y2="152.4" width="0.1524" layer="91"/>
 <label x="154.94" y="152.4" size="1.016" layer="95" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="SPI1_MOSI/PB5"/>
+<pinref part="U$8" gate="G$1" pin="SPI1_MOSI/PB5"/>
 </segment>
 </net>
 <net name="SW-C" class="0">
@@ -4466,7 +4434,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <wire x1="154.94" y1="147.32" x2="152.4" y2="147.32" width="0.1524" layer="91"/>
 <label x="154.94" y="147.32" size="1.016" layer="95" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="SPI1_SCK/PB3"/>
+<pinref part="U$8" gate="G$1" pin="SPI1_SCK/PB3"/>
 </segment>
 </net>
 <net name="SW-B" class="0">
@@ -4478,7 +4446,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <wire x1="154.94" y1="157.48" x2="152.4" y2="157.48" width="0.1524" layer="91"/>
 <label x="154.94" y="157.48" size="1.016" layer="95" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="I2C1_SDA/USART1_RX/PB7"/>
+<pinref part="U$8" gate="G$1" pin="I2C1_SDA/USART1_RX/PB7"/>
 </segment>
 </net>
 <net name="SW-D" class="0">
@@ -4490,7 +4458,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <wire x1="154.94" y1="154.94" x2="152.4" y2="154.94" width="0.1524" layer="91"/>
 <label x="154.94" y="154.94" size="1.016" layer="95" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="I2C1_SCL/USART1_TX/PB6"/>
+<pinref part="U$8" gate="G$1" pin="I2C1_SCL/USART1_TX/PB6"/>
 </segment>
 </net>
 <net name="D+" class="0">
@@ -4501,8 +4469,8 @@ Standard 0603 ceramic capacitor, and 0.1
 </segment>
 <segment>
 <label x="182.88" y="137.16" size="1.016" layer="95" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="CAN_TX/I2C1_SDA/USB_DP/PA12"/>
 <wire x1="152.4" y1="137.16" x2="182.88" y2="137.16" width="0.1524" layer="91"/>
+<pinref part="U$8" gate="G$1" pin="CAN_TX/I2C1_SDA/USB_DP/PA12"/>
 </segment>
 <segment>
 <pinref part="J1" gate="J" pin="MOSI"/>
@@ -4518,8 +4486,8 @@ Standard 0603 ceramic capacitor, and 0.1
 </segment>
 <segment>
 <label x="182.88" y="134.62" size="1.016" layer="95" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="CAN_RX/I2C1_SCL/USB_DM/PA11"/>
 <wire x1="152.4" y1="134.62" x2="182.88" y2="134.62" width="0.1524" layer="91"/>
+<pinref part="U$8" gate="G$1" pin="CAN_RX/I2C1_SCL/USB_DM/PA11"/>
 </segment>
 <segment>
 <pinref part="J1" gate="J" pin="\RST"/>
@@ -4553,7 +4521,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <label x="60.96" y="147.32" size="1.016" layer="95" rot="R180" xref="yes"/>
 <wire x1="60.96" y1="147.32" x2="66.04" y2="147.32" width="0.1524" layer="91"/>
-<pinref part="U1" gate="G$1" pin="PA1/ADC1"/>
+<pinref part="U$8" gate="G$1" pin="PA1/ADC1"/>
 </segment>
 </net>
 <net name="N$23" class="0">
@@ -4572,7 +4540,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <wire x1="154.94" y1="162.56" x2="152.4" y2="162.56" width="0.1524" layer="91"/>
 <label x="154.94" y="162.56" size="1.016" layer="95" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="I2C1_SCL/CAN_RX/PB8"/>
+<pinref part="U$8" gate="G$1" pin="BOOT0/I2C1_SCL/CAN_RX/PB8"/>
 </segment>
 </net>
 <net name="!RES" class="0">
@@ -4584,7 +4552,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <label x="58.42" y="142.24" size="1.016" layer="95" rot="R180" xref="yes"/>
 <wire x1="58.42" y1="142.24" x2="66.04" y2="142.24" width="0.1524" layer="91"/>
-<pinref part="U1" gate="G$1" pin="PA3/ADC3/USART2_RX"/>
+<pinref part="U$8" gate="G$1" pin="PA3/ADC3/USART2_RX"/>
 </segment>
 </net>
 <net name="D/!C" class="0">
@@ -4596,7 +4564,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <label x="58.42" y="139.7" size="1.016" layer="95" rot="R180" xref="yes"/>
 <wire x1="58.42" y1="139.7" x2="66.04" y2="139.7" width="0.1524" layer="91"/>
-<pinref part="U1" gate="G$1" pin="PA4/ADC4"/>
+<pinref part="U$8" gate="G$1" pin="PA4/ADC4"/>
 </segment>
 </net>
 <net name="T-" class="0">
@@ -4644,7 +4612,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <wire x1="152.4" y1="149.86" x2="154.94" y2="149.86" width="0.1524" layer="91"/>
 <label x="154.94" y="149.86" size="1.016" layer="95" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="SPI1_MISO/PB4"/>
+<pinref part="U$8" gate="G$1" pin="SPI1_MISO/PB4"/>
 </segment>
 </net>
 <net name="SPI_MOSI" class="0">
@@ -4656,7 +4624,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <wire x1="66.04" y1="132.08" x2="55.88" y2="132.08" width="0.1524" layer="91"/>
 <label x="55.88" y="132.08" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="PA7/ADC7/SPI1_MOSI"/>
+<pinref part="U$8" gate="G$1" pin="PA7/ADC7/SPI1_MOSI"/>
 </segment>
 </net>
 <net name="SPI_MISO" class="0">
@@ -4668,7 +4636,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <wire x1="66.04" y1="134.62" x2="55.88" y2="134.62" width="0.1524" layer="91"/>
 <label x="55.88" y="134.62" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="PA6/ADC6/SPI1_MISO"/>
+<pinref part="U$8" gate="G$1" pin="PA6/ADC6/SPI1_MISO"/>
 </segment>
 </net>
 <net name="SPI_SCK" class="0">
@@ -4685,7 +4653,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <wire x1="66.04" y1="137.16" x2="55.88" y2="137.16" width="0.1524" layer="91"/>
 <label x="55.88" y="137.16" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="PA5/ADC5/SPI1_SCK"/>
+<pinref part="U$8" gate="G$1" pin="PA5/ADC5/SPI1_SCK"/>
 </segment>
 </net>
 <net name="!CS_OLED" class="0">
@@ -4697,7 +4665,7 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <wire x1="66.04" y1="144.78" x2="55.88" y2="144.78" width="0.1524" layer="91"/>
 <label x="55.88" y="144.78" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="PA2/ADC2/USART2_TX"/>
+<pinref part="U$8" gate="G$1" pin="PA2/ADC2/USART2_TX"/>
 </segment>
 </net>
 <net name="!CS_MAX" class="0">
@@ -4709,14 +4677,14 @@ Standard 0603 ceramic capacitor, and 0.1
 <segment>
 <wire x1="152.4" y1="144.78" x2="162.56" y2="144.78" width="0.1524" layer="91"/>
 <label x="162.56" y="144.78" size="1.27" layer="95" xref="yes"/>
-<pinref part="U1" gate="G$1" pin="USART2_RX/PA15"/>
+<pinref part="U$8" gate="G$1" pin="USART2_RX/PA15"/>
 </segment>
 </net>
 <net name="AUX-TX" class="0">
 <segment>
-<pinref part="U1" gate="G$1" pin="USART1_TX/I2C1_SCL/PA9"/>
 <wire x1="152.4" y1="129.54" x2="190.5" y2="129.54" width="0.1524" layer="91"/>
 <label x="190.5" y="129.54" size="1.27" layer="95" xref="yes"/>
+<pinref part="U$8" gate="G$1" pin="USART1_TX/I2C1_SCL/PA9"/>
 </segment>
 <segment>
 <pinref part="JP1" gate="G$1" pin="2"/>
@@ -4726,9 +4694,9 @@ Standard 0603 ceramic capacitor, and 0.1
 </net>
 <net name="AUX-RX" class="0">
 <segment>
-<pinref part="U1" gate="G$1" pin="USART1_RX/I2C1_SDA/PA10"/>
 <wire x1="152.4" y1="132.08" x2="190.5" y2="132.08" width="0.1524" layer="91"/>
 <label x="190.5" y="132.08" size="1.27" layer="95" xref="yes"/>
+<pinref part="U$8" gate="G$1" pin="USART1_RX/I2C1_SDA/PA10"/>
 </segment>
 <segment>
 <pinref part="JP1" gate="G$1" pin="1"/>
@@ -4743,9 +4711,9 @@ Standard 0603 ceramic capacitor, and 0.1
 <label x="254" y="63.5" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
 <segment>
-<pinref part="U1" gate="G$1" pin="USART2_TX/SWCLK/PA14"/>
 <wire x1="172.72" y1="142.24" x2="152.4" y2="142.24" width="0.1524" layer="91"/>
 <label x="172.72" y="142.24" size="1.27" layer="95" xref="yes"/>
+<pinref part="U$8" gate="G$1" pin="USART2_TX/SWCLK/PA14"/>
 </segment>
 </net>
 <net name="SWDIO" class="0">
@@ -4755,9 +4723,9 @@ Standard 0603 ceramic capacitor, and 0.1
 <label x="254" y="60.96" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
 <segment>
-<pinref part="U1" gate="G$1" pin="SWDIO/PA13"/>
 <wire x1="172.72" y1="139.7" x2="152.4" y2="139.7" width="0.1524" layer="91"/>
 <label x="172.72" y="139.7" size="1.27" layer="95" xref="yes"/>
+<pinref part="U$8" gate="G$1" pin="SWDIO/PA13"/>
 </segment>
 </net>
 </nets>