Files @ 7527bab9ca74
Branch filter:

Location: therm/drivers/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c - annotation

Ethan Zonca
Tweaks to PID word length, commenting
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
ab7abb62e433
/* ----------------------------------------------------------------------    
* Copyright (C) 2010-2013 ARM Limited. All rights reserved.    
*    
* $Date:        17. January 2013 
* $Revision: 	V1.4.1
*    
* Project: 	    CMSIS DSP Library    
* Title:	    arm_mat_mult_f32.c    
*    
* Description:  Floating-point matrix multiplication.    
*    
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*  
* Redistribution and use in source and binary forms, with or without 
* modification, are permitted provided that the following conditions
* are met:
*   - Redistributions of source code must retain the above copyright
*     notice, this list of conditions and the following disclaimer.
*   - Redistributions in binary form must reproduce the above copyright
*     notice, this list of conditions and the following disclaimer in
*     the documentation and/or other materials provided with the 
*     distribution.
*   - Neither the name of ARM LIMITED nor the names of its contributors
*     may be used to endorse or promote products derived from this
*     software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.  
* -------------------------------------------------------------------- */

#include "arm_math.h"

/**    
 * @ingroup groupMatrix    
 */

/**    
 * @defgroup MatrixMult Matrix Multiplication    
 *    
 * Multiplies two matrices.    
 *    
 * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices"    
    
 * Matrix multiplication is only defined if the number of columns of the    
 * first matrix equals the number of rows of the second matrix.    
 * Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results    
 * in an <code>M x P</code> matrix.    
 * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of    
 * <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output    
 * matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.    
 */


/**    
 * @addtogroup MatrixMult    
 * @{    
 */

/**    
 * @brief Floating-point matrix multiplication.    
 * @param[in]       *pSrcA points to the first input matrix structure    
 * @param[in]       *pSrcB points to the second input matrix structure    
 * @param[out]      *pDst points to output matrix structure    
 * @return     		The function returns either    
 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.    
 */

arm_status arm_mat_mult_f32(
  const arm_matrix_instance_f32 * pSrcA,
  const arm_matrix_instance_f32 * pSrcB,
  arm_matrix_instance_f32 * pDst)
{
  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
  float32_t *px;                                 /* Temporary output data matrix pointer */
  float32_t sum;                                 /* Accumulator */
  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */

#ifndef ARM_MATH_CM0_FAMILY

  /* Run the below code for Cortex-M4 and Cortex-M3 */

  float32_t in1, in2, in3, in4;
  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
  arm_status status;                             /* status of matrix multiplication */

#ifdef ARM_MATH_MATRIX_CHECK


  /* Check for matrix mismatch condition */
  if((pSrcA->numCols != pSrcB->numRows) ||
     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
  {

    /* Set status as ARM_MATH_SIZE_MISMATCH */
    status = ARM_MATH_SIZE_MISMATCH;
  }
  else
#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */

  {
    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
    /* row loop */
    do
    {
      /* Output pointer is set to starting address of the row being processed */
      px = pOut + i;

      /* For every row wise process, the column loop counter is to be initiated */
      col = numColsB;

      /* For every row wise process, the pIn2 pointer is set    
       ** to the starting address of the pSrcB data */
      pIn2 = pSrcB->pData;

      j = 0u;

      /* column loop */
      do
      {
        /* Set the variable sum, that acts as accumulator, to zero */
        sum = 0.0f;

        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
        pIn1 = pInA;

        /* Apply loop unrolling and compute 4 MACs simultaneously. */
        colCnt = numColsA >> 2u;

        /* matrix multiplication        */
        while(colCnt > 0u)
        {
          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
          in3 = *pIn2;
          pIn2 += numColsB;
          in1 = pIn1[0];
          in2 = pIn1[1];
          sum += in1 * in3;
          in4 = *pIn2;
          pIn2 += numColsB;
          sum += in2 * in4;

          in3 = *pIn2;
          pIn2 += numColsB;
          in1 = pIn1[2];
          in2 = pIn1[3];
          sum += in1 * in3;
          in4 = *pIn2;
          pIn2 += numColsB;
          sum += in2 * in4;
          pIn1 += 4u;

          /* Decrement the loop count */
          colCnt--;
        }

        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.    
         ** No loop unrolling is used. */
        colCnt = numColsA % 0x4u;

        while(colCnt > 0u)
        {
          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
          sum += *pIn1++ * (*pIn2);
          pIn2 += numColsB;

          /* Decrement the loop counter */
          colCnt--;
        }

        /* Store the result in the destination buffer */
        *px++ = sum;

        /* Update the pointer pIn2 to point to the  starting address of the next column */
        j++;
        pIn2 = pSrcB->pData + j;

        /* Decrement the column loop counter */
        col--;

      } while(col > 0u);

#else

  /* Run the below code for Cortex-M0 */

  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
  uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
  arm_status status;                             /* status of matrix multiplication */

#ifdef ARM_MATH_MATRIX_CHECK

  /* Check for matrix mismatch condition */
  if((pSrcA->numCols != pSrcB->numRows) ||
     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
  {

    /* Set status as ARM_MATH_SIZE_MISMATCH */
    status = ARM_MATH_SIZE_MISMATCH;
  }
  else
#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */

  {
    /* The following loop performs the dot-product of each row in pInA with each column in pInB */
    /* row loop */
    do
    {
      /* Output pointer is set to starting address of the row being processed */
      px = pOut + i;

      /* For every row wise process, the column loop counter is to be initiated */
      col = numColsB;

      /* For every row wise process, the pIn2 pointer is set     
       ** to the starting address of the pSrcB data */
      pIn2 = pSrcB->pData;

      /* column loop */
      do
      {
        /* Set the variable sum, that acts as accumulator, to zero */
        sum = 0.0f;

        /* Initialize the pointer pIn1 to point to the starting address of the row being processed */
        pIn1 = pInA;

        /* Matrix A columns number of MAC operations are to be performed */
        colCnt = numColsA;

        while(colCnt > 0u)
        {
          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
          sum += *pIn1++ * (*pIn2);
          pIn2 += numColsB;

          /* Decrement the loop counter */
          colCnt--;
        }

        /* Store the result in the destination buffer */
        *px++ = sum;

        /* Decrement the column loop counter */
        col--;

        /* Update the pointer pIn2 to point to the  starting address of the next column */
        pIn2 = pInB + (numColsB - col);

      } while(col > 0u);

#endif /* #ifndef ARM_MATH_CM0_FAMILY */

      /* Update the pointer pInA to point to the  starting address of the next row */
      i = i + numColsB;
      pInA = pInA + numColsA;

      /* Decrement the row loop counter */
      row--;

    } while(row > 0u);
    /* Set status as ARM_MATH_SUCCESS */
    status = ARM_MATH_SUCCESS;
  }

  /* Return to application */
  return (status);
}

/**    
 * @} end of MatrixMult group    
 */