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SPI setup using stdperiph
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 <span id="projectnumber">Version 3.20</span>
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<div id="projectbrief">CMSIS-CORE support for Cortex-M processor-based devices</div>
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<tr id="row_0_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="union_a_p_s_r___type.html" target="_self">APSR_Type</a></td><td class="desc">Union type to access the Application Program Status Register (APSR)</td></tr>
<tr id="row_1_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="union_c_o_n_t_r_o_l___type.html" target="_self">CONTROL_Type</a></td><td class="desc">Union type to access the Control Registers (CONTROL)</td></tr>
<tr id="row_2_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_core_debug___type.html" target="_self">CoreDebug_Type</a></td><td class="desc">Structure type to access the Core Debug Register (CoreDebug)</td></tr>
<tr id="row_3_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_d_w_t___type.html" target="_self">DWT_Type</a></td><td class="desc">Structure type to access the Data Watchpoint and Trace Register (DWT)</td></tr>
<tr id="row_4_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_f_p_u___type.html" target="_self">FPU_Type</a></td><td class="desc">Structure type to access the Floating Point Unit (FPU)</td></tr>
<tr id="row_5_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="union_i_p_s_r___type.html" target="_self">IPSR_Type</a></td><td class="desc">Union type to access the Interrupt Program Status Register (IPSR)</td></tr>
<tr id="row_6_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_i_t_m___type.html" target="_self">ITM_Type</a></td><td class="desc">Structure type to access the Instrumentation Trace Macrocell Register (ITM)</td></tr>
<tr id="row_7_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_m_p_u___type.html" target="_self">MPU_Type</a></td><td class="desc">Structure type to access the Memory Protection Unit (MPU)</td></tr>
<tr id="row_8_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_n_v_i_c___type.html" target="_self">NVIC_Type</a></td><td class="desc">Structure type to access the Nested Vectored Interrupt Controller (NVIC)</td></tr>
<tr id="row_9_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_s_c_b___type.html" target="_self">SCB_Type</a></td><td class="desc">Structure type to access the System Control Block (SCB)</td></tr>
<tr id="row_10_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_s_cn_s_c_b___type.html" target="_self">SCnSCB_Type</a></td><td class="desc">Structure type to access the System Control and ID Register not in the SCB</td></tr>
<tr id="row_11_"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_sys_tick___type.html" target="_self">SysTick_Type</a></td><td class="desc">Structure type to access the System Timer (SysTick)</td></tr>
<tr id="row_12_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="struct_t_p_i___type.html" target="_self">TPI_Type</a></td><td class="desc">Structure type to access the Trace Port Interface Register (TPI)</td></tr>
<tr id="row_13_"><td class="entry"><img src="ftv2lastnode.png" alt="\" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="unionx_p_s_r___type.html" target="_self">xPSR_Type</a></td><td class="desc">Union type to access the Special-Purpose Program Status Registers (xPSR)</td></tr>
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