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Location: therm/drivers/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c - annotation
facb8c86942c
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Removed dead code, fixed SPI clock rate, removed unneeded delays
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* Copyright (C) 2010-2013 ARM Limited. All rights reserved.
*
* $Date: 17. January 2013
* $Revision: V1.4.1
*
* Project: CMSIS DSP Library
* Title: arm_q31_to_q7.c
*
* Description: Converts the elements of the Q31 vector to Q7 vector.
*
* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* - Neither the name of ARM LIMITED nor the names of its contributors
* may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* ---------------------------------------------------------------------------- */
#include "arm_math.h"
/**
* @ingroup groupSupport
*/
/**
* @addtogroup q31_to_x
* @{
*/
/**
* @brief Converts the elements of the Q31 vector to Q7 vector.
* @param[in] *pSrc points to the Q31 input vector
* @param[out] *pDst points to the Q7 output vector
* @param[in] blockSize length of the input vector
* @return none.
*
* \par Description:
*
* The equation used for the conversion process is:
*
* <pre>
* pDst[n] = (q7_t) pSrc[n] >> 24; 0 <= n < blockSize.
* </pre>
*
*/
void arm_q31_to_q7(
q31_t * pSrc,
q7_t * pDst,
uint32_t blockSize)
{
q31_t *pIn = pSrc; /* Src pointer */
uint32_t blkCnt; /* loop counter */
#ifndef ARM_MATH_CM0_FAMILY
/* Run the below code for Cortex-M4 and Cortex-M3 */
q31_t in1, in2, in3, in4;
q7_t out1, out2, out3, out4;
/*loop Unrolling */
blkCnt = blockSize >> 2u;
/* First part of the processing with loop unrolling. Compute 4 outputs at a time.
** a second loop below computes the remaining 1 to 3 samples. */
while(blkCnt > 0u)
{
/* C = (q7_t) A >> 24 */
/* convert from q31 to q7 and then store the results in the destination buffer */
in1 = *pIn++;
in2 = *pIn++;
in3 = *pIn++;
in4 = *pIn++;
out1 = (q7_t) (in1 >> 24);
out2 = (q7_t) (in2 >> 24);
out3 = (q7_t) (in3 >> 24);
out4 = (q7_t) (in4 >> 24);
*__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
/* Decrement the loop counter */
blkCnt--;
}
/* If the blockSize is not a multiple of 4, compute any remaining output samples here.
** No loop unrolling is used. */
blkCnt = blockSize % 0x4u;
#else
/* Run the below code for Cortex-M0 */
/* Loop over blockSize number of values */
blkCnt = blockSize;
#endif /* #ifndef ARM_MATH_CM0_FAMILY */
while(blkCnt > 0u)
{
/* C = (q7_t) A >> 24 */
/* convert from q31 to q7 and then store the results in the destination buffer */
*pDst++ = (q7_t) (*pIn++ >> 24);
/* Decrement the loop counter */
blkCnt--;
}
}
/**
* @} end of q31_to_x group
*/
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