diff --git a/Makefile b/Makefile --- a/Makefile +++ b/Makefile @@ -10,7 +10,9 @@ LIBDIR:=libraries HAL_LIB:=$(LIBDIR)/STM32F0xx_HAL_Driver USB_LIB:=$(LIBDIR)/STM32_USB_Device_Library -STARTUP:=$(STMLIB)/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc +STARTUP:=$(LIBDIR)/CMSIS/Device/ST/STM32F0xx/Source/Templates/gcc + +SYSTEMDIR:=$(LIBDIR)/CMSIS/Device/ST/STM32F0xx/Source/Templates # Houses system_STM32f0xx.c LINKER_SCRIPT:=$(CURDIR)/stm32-flash.ld @@ -31,19 +33,18 @@ INCLUDE+=-I$(HAL_LIB)/Inc # vpath is used so object files are written to the current directory instead # of the same directory as their source files -vpath %.c $(HAL_LIB)/src \ - $(LIBDIR)/$(USB_LIB) \ - $(LIBDIR)/$(USB_LIB)/Class/CDC \ - $(LIBDIR)/$(USB_LIB)/Core +vpath %.c $(HAL_LIB)/Src \ + $(USB_LIB) \ + $(USB_LIB)/Class/CDC \ + $(USB_LIB)/Core \ + $(SYSTEMDIR) + vpath %.s $(STARTUP) -ASRC=startup_stm32f042x6.s +ASRC=$(STARTUP)/startup_stm32f042x6.s # Project Source Files SRC=main.c -SRC+=stm32f0xx_it.c -SRC+=stm32f0xx_hal_msp.c -SRC+=system_stm32f0xx.c SRC+=ssd1306.c SRC+=eeprom_min.c SRC+=gpio.c @@ -51,38 +52,36 @@ SRC+=spi.c SRC+=clock.c SRC+=stringhelpers.c -# Discovery Source Files -#SRC+=stm32f4_discovery_lis302dl.c -#SRC+=stm32f4_discovery.c -#SRC+=stm32f4_discovery_audio_codec.c +SRC+=stm32f0xx_it.c +SRC+=stm32f0xx_hal_msp.c + +SRC+=usb_device.c +SRC+=usbd_cdc_if.c +SRC+=usbd_conf.c +SRC+=usbd_desc.c # Standard Peripheral Source Files -SRC+=stm32f0xx_syscfg.c -SRC+=misc.c -SRC+=stm32f0xx_adc.c -SRC+=stm32f0xx_dac.c -SRC+=stm32f0xx_dma.c -SRC+=stm32f0xx_exti.c -SRC+=stm32f0xx_flash.c -SRC+=stm32f0xx_gpio.c -SRC+=stm32f0xx_i2c.c -SRC+=stm32f0xx_rcc.c -SRC+=stm32f0xx_spi.c -SRC+=stm32f0xx_tim.c +SRC+=system_stm32f0xx.c + +SRC+=stm32f0xx_hal.c +SRC+=stm32f0xx_hal_spi.c +SRC+=stm32f0xx_hal_pcd.c +SRC+=stm32f0xx_hal_pcd_ex.c +SRC+=stm32f0xx_hal_cortex.c +SRC+=stm32f0xx_hal_dma.c +SRC+=stm32f0xx_hal_flash.c +SRC+=stm32f0xx_hal_flash_ex.c +SRC+=stm32f0xx_hal_gpio.c +SRC+=stm32f0xx_hal_pwr.c +SRC+=stm32f0xx_hal_pwr_ex.c +SRC+=stm32f0xx_hal_rcc.c +SRC+=stm32f0xx_hal_rcc_ex.c # USB Source Files -SRC+=usb_core.c -SRC+=usb_init.c -SRC+=usb_int.c -SRC+=usb_mem.c -SRC+=usb_regs.c -SRC+=usb_sil.c -SRC+=hw_config.c -SRC+=usb_desc.c -SRC+=usb_endp.c -SRC+=usb_istr.c -SRC+=usb_prop.c -SRC+=usb_pwr.c +SRC+=usbd_cdc.c +SRC+=usbd_core.c +SRC+=usbd_ctlreq.c +SRC+=usbd_ioreq.c CDEFS=-DUSE_STDPERIPH_DRIVER CDEFS+=-DSTM32F0XX diff --git a/clock.c b/clock.c --- a/clock.c +++ b/clock.c @@ -1,3 +1,5 @@ + +#include "stm32f0xx_hal_conf.h" void SystemClock_Config(void) { diff --git a/config.h b/config.h --- a/config.h +++ b/config.h @@ -4,18 +4,18 @@ #define SSR_PERIOD 200 -#define LED_POWER GPIOB,GPIO_Pin_9 -#define LED_STAT GPIOA,GPIO_Pin_15 +#define LED_POWER GPIOB,GPIO_PIN_9 +#define LED_STAT GPIOA,GPIO_PIN_15 -#define MAX_CS GPIOB,GPIO_Pin_12 +#define MAX_CS GPIOB,GPIO_PIN_12 -#define SW_BTN GPIOB, GPIO_Pin_3 -#define SW_UP GPIOB, GPIO_Pin_6 -#define SW_DOWN GPIOB, GPIO_Pin_4 -#define SW_LEFT GPIOB, GPIO_Pin_7 -#define SW_RIGHT GPIOB, GPIO_Pin_5 +#define SW_BTN GPIOB, GPIO_PIN_3 +#define SW_UP GPIOB, GPIO_PIN_6 +#define SW_DOWN GPIOB, GPIO_PIN_4 +#define SW_LEFT GPIOB, GPIO_PIN_7 +#define SW_RIGHT GPIOB, GPIO_PIN_5 -#define SSR_PIN GPIOC, GPIO_Pin_13 +#define SSR_PIN GPIOC, GPIO_PIN_13 #endif diff --git a/gpio.c b/gpio.c --- a/gpio.c +++ b/gpio.c @@ -1,5 +1,7 @@ #include "gpio.h" #include "config.h" +#include "stm32f0xx_hal_conf.h" +#include extern volatile uint32_t ticks; @@ -9,11 +11,11 @@ uint32_t change_time_reset = 0; void user_input(uint16_t* to_modify) { if(CHANGE_ELAPSED) { - if(!GPIO_ReadInputDataBit(SW_UP) ) { + if(!HAL_GPIO_ReadPin(SW_UP) ) { CHANGE_RESET; (*to_modify)++; } - else if(!GPIO_ReadInputDataBit(SW_DOWN) && (*to_modify) > 0) { + else if(!HAL_GPIO_ReadPin(SW_DOWN) && (*to_modify) > 0) { CHANGE_RESET; (*to_modify)--; } @@ -88,19 +90,19 @@ void init_gpio(void) { // SPI1 [PORTA] // Configure GPIO pin : PA, MOSI, SCK - GPIO_InitStruct.GPIO_Pin = GPIO_PIN_7|GPIO_PIN_5; - GPIO_InitStruct.GPIO_Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.GPIO_PuPd = GPIO_NOPULL; - GPIO_InitStruct.GPIO_Speed = GPIO_SPEED_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF1_SPI1; + GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_5; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF0_SPI1; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); // Configure GPIO pin: PA, MISO - GPIO_InitStruct.GPIO_Pin = GPIO_PIN_6; - GPIO_InitStruct.GPIO_Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.GPIO_PuPd = GPIO_NOPULL; - GPIO_InitStruct.GPIO_Speed = GPIO_SPEED_HIGH; - GPIO_InitStruct.Alternate = GPIO_AF1_SPI1; + GPIO_InitStruct.Pin = GPIO_PIN_6; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF0_SPI1; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); // USB [PORTA] @@ -110,11 +112,11 @@ void init_gpio(void) { PA12 ------> USB_DP */ // Configure GPIO pin : PA, D+, D- - GPIO_InitStruct.GPIO_Pin = GPIO_Pin_11|GPIO_Pin_12; - GPIO_InitStruct.GPIO_Mode = GPIO_MODE_AF_PP; - GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL; - GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz; - GPIO_InitStruct.Alternate = GPIO_AF1_USB; + GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12; + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_NOPULL; + GPIO_InitStruct.Speed = GPIO_SPEED_HIGH; + GPIO_InitStruct.Alternate = GPIO_AF2_USB; // Can also be AF5 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); diff --git a/gpio.h b/gpio.h --- a/gpio.h +++ b/gpio.h @@ -1,6 +1,7 @@ #ifndef GPIO_H #define GPIO_H +#include #define CHANGE_PERIOD_MS 100 #define CHANGE_ELAPSED (ticks - change_time_reset) > CHANGE_PERIOD_MS diff --git a/libraries/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h b/libraries/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h --- a/libraries/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h +++ b/libraries/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h @@ -78,7 +78,7 @@ /* #define STM32F030x8 */ /*!< STM32F030x8 Devices (STM32F030xx microcontrollers where the Flash memory is 64 Kbytes) */ /* #define STM32F031x6 */ /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */ /* #define STM32F038xx */ /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes) */ - /* #define STM32F042x6 */ /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */ + #define STM32F042x6 /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */ /* #define STM32F048x6 */ /*!< STM32F048xx Devices (STM32F042xx microcontrollers where the Flash memory is 32 Kbytes) */ /* #define STM32F051x8 */ /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */ /* #define STM32F058xx */ /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes) */ diff --git a/libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c b/libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c --- a/libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c +++ b/libraries/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c @@ -82,6 +82,7 @@ */ #include "stm32f0xx.h" +#include "stm32f0xx_hal_conf.h" // EMZ /** * @} diff --git a/libraries/STM32_USB_Device_Library/Class/CDC/usbd_cdc.c b/libraries/STM32_USB_Device_Library/Class/CDC/usbd_cdc.c --- a/libraries/STM32_USB_Device_Library/Class/CDC/usbd_cdc.c +++ b/libraries/STM32_USB_Device_Library/Class/CDC/usbd_cdc.c @@ -59,7 +59,7 @@ */ /* Includes ------------------------------------------------------------------*/ -#include "USBD_CDC.h" +#include "usbd_cdc.h" #include "usbd_desc.h" #include "usbd_ctlreq.h" diff --git a/main.c b/main.c --- a/main.c +++ b/main.c @@ -1,29 +1,23 @@ #include "main.h" +#include #include "stm32f0xx_hal_conf.h" -#include "usb_device.h" +//#include "usb_device.h" #include "ssd1306.h" #include "config.h" #include "eeprom_min.h" #include "gpio.h" #include "clock.h" -#include "spi.h" - -// USB includes -//#include "hw_config.h" -//#include "usb_lib.h" -//#include "usb_desc.h" -//#include "usb_pwr.h" -//#include "stringhelpers.h" +//#include "spi.h" // TODO: Grab buttonpresses with interrupts // USB Supporting Vars -extern __IO uint8_t Receive_Buffer[64]; -extern __IO uint32_t Receive_length ; -extern __IO uint32_t length ; -uint8_t Send_Buffer[64]; -uint32_t packet_sent=1; -uint32_t packet_receive=1; +//extern __IO uint8_t Receive_Buffer[64]; +//extern __IO uint32_t Receive_length ; +//extern __IO uint32_t length ; +//uint8_t Send_Buffer[64]; +//uint32_t packet_sent=1; +//uint32_t packet_receive=1; enum tempunits { TEMP_UNITS_CELSIUS = 0, @@ -47,7 +41,7 @@ int16_t setpoint_brew = 0; int16_t setpoint_steam = 0; // HAL Variables -SPI_HandleTypeDef hspi1; +//extern SPI_HandleTypeDef spi1; // State definition @@ -92,20 +86,20 @@ int main(void) init_gpio(); // Turn on power LED - GPIO_SetBits(LED_POWER); + HAL_GPIO_WritePin(LED_POWER, 1); // TODO: Awesome pwm of power LED (TIM4_CH4 or TIM11_CH1) // Configure 1ms SysTick (change if more temporal resolution needed) - RCC_ClocksTypeDef RCC_Clocks; - RCC_GetClocksFreq(&RCC_Clocks); - SysTick_Config(RCC_Clocks.HCLK_Frequency / 1000); + //RCC_ClocksTypeDef RCC_Clocks; + //RCC_GetClocksFreq(&RCC_Clocks); + //SysTick_Config(RCC_Clocks.HCLK_Frequency / 1000); // Init SPI busses - init_spi(); + //init_spi(&spi1); // Init USB - init_usb(); + //MX_USB_DEVICE_Init(); // Init OLED over SPI ssd1306_Init(); @@ -139,7 +133,7 @@ int main(void) if(boottobrew) state = STATE_PREHEAT_BREW; // Go to brew instead of idle if configured thusly - GPIO_ResetBits(LED_STAT); + HAL_GPIO_WritePin(LED_STAT, 0); // Main loop while(1) @@ -157,15 +151,26 @@ int32_t temp = 0; uint8_t temp_frac = 0; uint8_t state_resume = 0; + +// FIXME: Now this needs to work 8bits at a time, or change the port mode on the fly void update_temp() { // Assert CS - GPIO_ResetBits(MAX_CS); + HAL_GPIO_WritePin(MAX_CS, 0); delay(1); // This may not clock at all... might need to send 16 bits first - SPI_I2S_SendData(SPI2, 0xAAAA); // send dummy data - //SPI_I2S_SendData(SPI2, 0xAA); // send dummy data - uint16_t temp_pre = SPI_I2S_ReceiveData(SPI2); + // SPI_I2S_SendData(SPI2, 0xAAAA); // send dummy data + + uint8_t data[2] = {0xAA, 0xAA}; + //HAL_SPI_Transmit(&spi1, data, 2, 100); + + //OLD: SPI_I2S_SendData(SPI2, 0xAA); // send dummy data + // OLD: uint16_t temp_pre = SPI_I2S_ReceiveData(SPI2); + + //HAL_SPI_Receive(&spi1, data, 2, 100); + + // Assemble data array into one var + uint16_t temp_pre = data[0] & (data[1]<<8); if(temp_pre & 0b0000000000000010) { ssd1306_DrawString("Fatal Error", 3, 35); @@ -214,7 +219,7 @@ void update_temp() { // Deassert CS delay(1); - GPIO_SetBits(MAX_CS); + HAL_GPIO_WritePin(MAX_CS, 1); } @@ -285,7 +290,7 @@ void process() if(ticks - last_led > 400) { - GPIO_ToggleBits(LED_POWER); + HAL_GPIO_TogglePin(LED_POWER); last_led = ticks; } @@ -308,11 +313,11 @@ void process() if(ssr_output > 0) { char tempstr[6]; - itoa(ssr_output, tempstr); + itoa(ssr_output, tempstr, 10); ssd1306_DrawString(tempstr, 0, 90); - GPIO_SetBits(LED_STAT); - GPIO_SetBits(SSR_PIN); + HAL_GPIO_WritePin(LED_STAT, 1); + HAL_GPIO_WritePin(SSR_PIN, 1); last_ssr_on = ticks; } } @@ -320,8 +325,8 @@ void process() // Kill SSR after elapsed period less than SSR_PERIOD if(ticks - last_ssr_on > ssr_output || ssr_output == 0) { - GPIO_ResetBits(LED_STAT); - GPIO_ResetBits(SSR_PIN); + HAL_GPIO_WritePin(LED_STAT, 0); + HAL_GPIO_WritePin(SSR_PIN, 0); } } @@ -331,7 +336,7 @@ void draw_setpoint() { ssd1306_DrawStringBig(" ", 3, 0); ssd1306_DrawStringBig(tempstr, 3, 0); ssd1306_DrawStringBig(">", 3, 74); - itoa(setpoint, tempstr); + itoa(setpoint, tempstr, 10); ssd1306_DrawStringBig(" ", 3, 90); ssd1306_DrawStringBig(tempstr, 3, 90); } @@ -431,11 +436,11 @@ void machine() uint8_t temp_changed = temp != last_temp; last_temp = temp; - uint8_t sw_btn = !GPIO_ReadInputDataBit(SW_BTN); - uint8_t sw_up = !GPIO_ReadInputDataBit(SW_UP); - uint8_t sw_down = !GPIO_ReadInputDataBit(SW_DOWN); - uint8_t sw_left = !GPIO_ReadInputDataBit(SW_LEFT); - uint8_t sw_right = !GPIO_ReadInputDataBit(SW_RIGHT); + uint8_t sw_btn = !HAL_GPIO_ReadPin(SW_BTN); + uint8_t sw_up = !HAL_GPIO_ReadPin(SW_UP); + uint8_t sw_down = !HAL_GPIO_ReadPin(SW_DOWN); + uint8_t sw_left = !HAL_GPIO_ReadPin(SW_LEFT); + uint8_t sw_right = !HAL_GPIO_ReadPin(SW_RIGHT); switch(state) { @@ -512,7 +517,7 @@ void machine() ssd1306_drawlogo(); char tempstr[6]; - itoa(k_p, tempstr); + itoa(k_p, tempstr, 10); ssd1306_DrawString("P=", 1, 45); ssd1306_DrawString(" ", 1, 57); ssd1306_DrawString(tempstr, 1, 57); @@ -541,7 +546,7 @@ void machine() ssd1306_drawlogo(); char tempstr[6]; - itoa(k_i, tempstr); + itoa(k_i, tempstr, 10); ssd1306_DrawString("I=", 1, 45); ssd1306_DrawString(" ", 1, 57); ssd1306_DrawString(tempstr, 1, 57); @@ -570,7 +575,7 @@ void machine() ssd1306_drawlogo(); char tempstr[6]; - itoa(k_d, tempstr); + itoa(k_d, tempstr, 10); ssd1306_DrawString("D=", 1, 45); ssd1306_DrawString(" ", 1, 57); ssd1306_DrawString(tempstr, 1, 57); @@ -597,16 +602,16 @@ void machine() // [ Setpoint: ### ] char tempstr[6]; - itoa(final_setpoint, tempstr); + itoa(final_setpoint, tempstr, 10); ssd1306_DrawString("Step #", 0, 0); ssd1306_DrawString(tempstr, 0, 40); ssd1306_DrawString("Duration: ", 0, 5); - itoa(step_duration[final_setpoint], tempstr); + itoa(step_duration[final_setpoint], tempstr, 10); ssd1306_DrawString(tempstr, 0, 70); ssd1306_DrawString("Setpoint: ", 0, 0); - itoa(step_setpoint[final_setpoint], tempstr); + itoa(step_setpoint[final_setpoint], tempstr, 10); ssd1306_DrawString(tempstr, 0, 70); ssd1306_DrawString("Press to accept", 3, 40); @@ -638,7 +643,7 @@ void machine() ssd1306_drawlogo(); char tempstr[6]; - itoa(windup_guard, tempstr); + itoa(windup_guard, tempstr, 10); ssd1306_DrawString("G=", 1, 45); ssd1306_DrawString(" ", 1, 57); ssd1306_DrawString(tempstr, 1, 57); @@ -679,10 +684,10 @@ void machine() if(SW_BTN_PRESSED) { state = STATE_SETUNITS; } - else if(!GPIO_ReadInputDataBit(SW_UP)) { + else if(!HAL_GPIO_ReadPin(SW_UP)) { boottobrew = 1; } - else if(!GPIO_ReadInputDataBit(SW_DOWN)) { + else if(!HAL_GPIO_ReadPin(SW_DOWN)) { boottobrew = 0; } @@ -711,10 +716,10 @@ void machine() save_settings(); state = STATE_IDLE; } - else if(!GPIO_ReadInputDataBit(SW_UP)) { + else if(!HAL_GPIO_ReadPin(SW_UP)) { temp_units = TEMP_UNITS_FAHRENHEIT; } - else if(!GPIO_ReadInputDataBit(SW_DOWN)) { + else if(!HAL_GPIO_ReadPin(SW_DOWN)) { temp_units = TEMP_UNITS_CELSIUS; } diff --git a/main.h b/main.h --- a/main.h +++ b/main.h @@ -1,12 +1,13 @@ #ifndef __MAIN_H #define __MAIN_H -#define STM32F042x6 - #include "stm32f0xx_hal_conf.h" void TimingDelay_Decrement(void); void delay(__IO uint32_t nTime); +//SPI_HandleTypeDef spi1; + + #endif /* __MAIN_H */ diff --git a/spi.c b/spi.c --- a/spi.c +++ b/spi.c @@ -1,23 +1,24 @@ -void init_spi(void) +#include "stm32f0xx_hal_conf.h" +/* +void init_spi(SPI_HandleTypeDef* hspi1) { - SPI_HandleTypeDef hspi1; - hspi1.Instance = SPI1; - hspi1.Init.Mode = SPI_MODE_MASTER; - hspi1.Init.Direction = SPI_DIRECTION_2LINES; - hspi1.Init.DataSize = SPI_DATASIZE_8BIT; - hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; - hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; - hspi1.Init.NSS = SPI_NSS_SOFT; - hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; - hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; - hspi1.Init.TIMode = SPI_TIMODE_DISABLED; - hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED; - hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLED; - HAL_SPI_Init(&hspi1); - + hspi1->Instance = SPI1; + hspi1->Init.Mode = SPI_MODE_MASTER; + hspi1->Init.Direction = SPI_DIRECTION_2LINES; + hspi1->Init.DataSize = SPI_DATASIZE_8BIT; + hspi1->Init.CLKPolarity = SPI_POLARITY_LOW; + hspi1->Init.CLKPhase = SPI_PHASE_1EDGE; + hspi1->Init.NSS = SPI_NSS_SOFT; + hspi1->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8; + hspi1->Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi1->Init.TIMode = SPI_TIMODE_DISABLED; + hspi1->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED; + hspi1->Init.NSSPMode = SPI_NSS_PULSE_ENABLED; + HAL_SPI_Init(hspi1); +}*/ /* OLD: SPI_InitTypeDef SPI_InitStructure; @@ -51,6 +52,5 @@ void init_spi(void) SPI_Init(SPI2, &SPI_InitStructure); SPI_Cmd(SPI2, ENABLE); */ -} // vim:softtabstop=4 shiftwidth=4 expandtab diff --git a/spi.h b/spi.h --- a/spi.h +++ b/spi.h @@ -1,7 +1,9 @@ #ifndef SPI_H #define SPI_H -void init_spi(void); +#include "stm32f0xx_hal_conf.h" + +void init_spi(SPI_HandleTypeDef* hspi1); #endif diff --git a/ssd1306.c b/ssd1306.c --- a/ssd1306.c +++ b/ssd1306.c @@ -5,16 +5,16 @@ void WriteCommand(unsigned char command) { SSD_A0_Low(); - SPI_SendByte(command); - SPI_Wait(); + //SPI_SendByte(command); + //SPI_Wait(); } // Write data to OLED void WriteData(unsigned char data) { SSD_A0_High(); - SPI_SendByte(data); - SPI_Wait(); + //SPI_SendByte(data); + //SPI_Wait(); } // Initialize OLED diff --git a/ssd1306.h b/ssd1306.h --- a/ssd1306.h +++ b/ssd1306.h @@ -1,20 +1,29 @@ #ifndef ssd1306_H #define ssd1306_H -#define SSD_RESET GPIOB,GPIO_Pin_2 -#define SSD_A0 GPIOB,GPIO_Pin_10 -#define SSD_CS GPIOB,GPIO_Pin_1 +#define SSD_RESET GPIOB,GPIO_PIN_2 +#define SSD_A0 GPIOB,GPIO_PIN_10 +#define SSD_CS GPIOB,GPIO_PIN_1 -#define SSD_Reset_Low() GPIO_ResetBits(SSD_RESET) -#define SSD_Reset_High() GPIO_SetBits(SSD_RESET) -#define SSD_A0_Low() GPIO_ResetBits(SSD_A0) -#define SSD_A0_High() GPIO_SetBits(SSD_A0) -#define SSD_CS_Low() GPIO_ResetBits(SSD_CS) -#define SSD_CS_High() GPIO_SetBits(SSD_CS) +#define SSD_Reset_Low() HAL_GPIO_WritePin(SSD_RESET, 0) +#define SSD_Reset_High() HAL_GPIO_WritePin(SSD_RESET, 1) +#define SSD_A0_Low() HAL_GPIO_WritePin(SSD_A0, 0) +#define SSD_A0_High() HAL_GPIO_WritePin(SSD_A0, 1) +#define SSD_CS_Low() HAL_GPIO_WritePin(SSD_CS, 0) +#define SSD_CS_High() HAL_GPIO_WritePin(SSD_CS, 1) // Use stdperiph -#define SPI_SendByte(data) SPI_I2S_SendData(SPI1,data) -#define SPI_Wait() while(!(SPI1->SR&SPI_I2S_FLAG_TXE));while(SPI1->SR&SPI_I2S_FLAG_BSY); + +//extern SPI_HandleTypeDef spi1; + +// EMZ FIXME this won't really work +//#define SPI_SendByte(data) HAL_SPI_Transmit(&spi1, data, 1, 100) +#define SPI_SendByte(data) +#define SPI_Wait() + +//#define SPI_SendByte(data) SPI_I2S_SendData(SPI1,data) + +//#define SPI_Wait() while(!(SPI1->SR&SPI_FLAG_TXE));while(SPI1->SR&SPI_FLAG_BSY); void ssd1306_Init(void); diff --git a/stm32f0xx_hal_conf.h b/stm32f0xx_hal_conf.h --- a/stm32f0xx_hal_conf.h +++ b/stm32f0xx_hal_conf.h @@ -63,7 +63,7 @@ //#define HAL_LPTIM_MODULE_ENABLED //#define HAL_RNG_MODULE_ENABLED //#define HAL_RTC_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED +//#define HAL_SPI_MODULE_ENABLED //#define HAL_TIM_MODULE_ENABLED //#define HAL_UART_MODULE_ENABLED //#define HAL_USART_MODULE_ENABLED diff --git a/stm32f0xx_hal_msp.c b/stm32f0xx_hal_msp.c --- a/stm32f0xx_hal_msp.c +++ b/stm32f0xx_hal_msp.c @@ -57,33 +57,25 @@ void HAL_MspInit(void) /* USER CODE END MspInit 1 */ } +/* void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { GPIO_InitTypeDef GPIO_InitStruct; if(hspi->Instance==SPI1) { - /* USER CODE BEGIN SPI1_MspInit 0 */ - - /* USER CODE END SPI1_MspInit 0 */ - /* Peripheral clock enable */ __SPI1_CLK_ENABLE(); - /**SPI1 GPIO Configuration - PA5 ------> SPI1_SCK - PA6 ------> SPI1_MISO - PA7 ------> SPI1_MOSI - */ + // SPI1 GPIO Configuration + // PA5 ------> SPI1_SCK + // PA6 ------> SPI1_MISO + // PA7 ------> SPI1_MOSI GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_LOW; GPIO_InitStruct.Alternate = GPIO_AF0_SPI1; HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - - /* USER CODE BEGIN SPI1_MspInit 1 */ - - /* USER CODE END SPI1_MspInit 1 */ } } @@ -93,25 +85,19 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef if(hspi->Instance==SPI1) { - /* USER CODE BEGIN SPI1_MspDeInit 0 */ - - /* USER CODE END SPI1_MspDeInit 0 */ - /* Peripheral clock disable */ + // Peripheral clock disable __SPI1_CLK_DISABLE(); - /**SPI1 GPIO Configuration - PA5 ------> SPI1_SCK - PA6 ------> SPI1_MISO - PA7 ------> SPI1_MOSI - */ + //SPI1 GPIO Configuration + // PA5 ------> SPI1_SCK + // PA6 ------> SPI1_MISO + // PA7 ------> SPI1_MOSI HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); - /* USER CODE BEGIN SPI1_MspDeInit 1 */ - - /* USER CODE END SPI1_MspDeInit 1 */ } } +*/ /* USER CODE BEGIN 1 */ diff --git a/system_stm32f0xx.c b/system_stm32f0xx.c deleted file mode 100644 --- a/system_stm32f0xx.c +++ /dev/null @@ -1,385 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32f0xx.c - * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 - * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File. - * This file contains the system clock configuration for STM32F0xx devices, - * and is customized for use with STM32F0-DISCOVERY Kit. - * The STM32F0xx is configured to run at 48 MHz, following the three - * configuration below: - * - PLL_SOURCE_HSI (default): HSI (~8MHz) used to clock the PLL, and - * the PLL is used as system clock source. - * - PLL_SOURCE_HSE : HSE (8MHz) used to clock the PLL, and - * the PLL is used as system clock source. - * - PLL_SOURCE_HSE_BYPASS : HSE bypassed with an external clock - * (8MHz, coming from ST-Link) used to clock - * the PLL, and the PLL is used as system - * clock source. - * - * - * 1. This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier - * and Divider factors, AHB/APBx prescalers and Flash settings), - * depending on the configuration selected (see above). - * This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32f0xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used - * by the user application to setup the SysTick - * timer or configure other parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * 2. After each device reset the HSI (8 MHz Range) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to - * configure the system clock before to branch to main program. - * - * 3. If the system clock source selected by user fails to startup, the SystemInit() - * function will do nothing and HSI still used as system clock source. User can - * add some code to deal with this issue inside the SetSysClock() function. - * - * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define - * in "stm32f0xx.h" file. When HSE is used as system clock source, directly or - * through PLL, and you are using different crystal you have to adapt the HSE - * value to your own configuration. - * - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2012 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f0xx_system - * @{ - */ - -/** @addtogroup STM32F0xx_System_Private_Includes - * @{ - */ - -#include "stm32f0xx.h" - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_Defines - * @{ - */ -/* Select the PLL clock source */ - -#define PLL_SOURCE_HSI // HSI (~8MHz) used to clock the PLL, and the PLL is used as system clock source -//#define PLL_SOURCE_HSE // HSE (8MHz) used to clock the PLL, and the PLL is used as system clock source -//#define PLL_SOURCE_HSE_BYPASS // HSE bypassed with an external clock (8MHz, coming from ST-Link) used to clock - // the PLL, and the PLL is used as system clock source - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_Variables - * @{ - */ -uint32_t SystemCoreClock = 48000000; -__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_FunctionPrototypes - * @{ - */ - -static void SetSysClock(void); - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * Initialize the Embedded Flash Interface, the PLL and update the - * SystemCoreClock variable. - * @param None - * @retval None - */ -void SystemInit (void) -{ - /* Set HSION bit */ - RCC->CR |= (uint32_t)0x00000001; - - /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */ - RCC->CFGR &= (uint32_t)0xF8FFB80C; - - /* Reset HSEON, CSSON and PLLON bits */ - RCC->CR &= (uint32_t)0xFEF6FFFF; - - /* Reset HSEBYP bit */ - RCC->CR &= (uint32_t)0xFFFBFFFF; - - /* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */ - RCC->CFGR &= (uint32_t)0xFFC0FFFF; - - /* Reset PREDIV1[3:0] bits */ - RCC->CFGR2 &= (uint32_t)0xFFFFFFF0; - - /* Reset USARTSW[1:0], I2CSW, CECSW and ADCSW bits */ - RCC->CFGR3 &= (uint32_t)0xFFFFFEAC; - - /* Reset HSI14 bit */ - RCC->CR2 &= (uint32_t)0xFFFFFFFE; - - /* Disable all interrupts */ - RCC->CIR = 0x00000000; - - /* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */ - SetSysClock(); -} - -/** - * @brief Update SystemCoreClock according to Clock Register Values - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or configure - * other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any configuration - * based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) - * or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (*) HSI_VALUE is a constant defined in stm32f0xx.h file (default value - * 8 MHz) but the real value may vary depending on the variations - * in voltage and temperature. - * - * (**) HSE_VALUE is a constant defined in stm32f0xx.h file (default value - * 8 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using fractional - * value for HSE crystal. - * @param None - * @retval None - */ -void SystemCoreClockUpdate (void) -{ - uint32_t tmp = 0, pllmull = 0, pllsource = 0, prediv1factor = 0; - - /* Get SYSCLK source -------------------------------------------------------*/ - tmp = RCC->CFGR & RCC_CFGR_SWS; - - switch (tmp) - { - case 0x00: /* HSI used as system clock */ - SystemCoreClock = HSI_VALUE; - break; - case 0x04: /* HSE used as system clock */ - SystemCoreClock = HSE_VALUE; - break; - case 0x08: /* PLL used as system clock */ - /* Get PLL clock source and multiplication factor ----------------------*/ - pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; - pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; - pllmull = ( pllmull >> 18) + 2; - - if (pllsource == 0x00) - { - /* HSI oscillator clock divided by 2 selected as PLL clock entry */ - SystemCoreClock = (HSI_VALUE >> 1) * pllmull; - } - else - { - prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; - /* HSE oscillator clock selected as PREDIV1 clock entry */ - SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; - } - break; - default: /* HSI used as system clock */ - SystemCoreClock = HSI_VALUE; - break; - } - /* Compute HCLK clock frequency ----------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @brief Configures the System clock frequency, AHB/APBx prescalers and Flash - * settings. - * @note This function should be called only once the RCC clock configuration - * is reset to the default reset state (done in SystemInit() function). - * @param None - * @retval None - */ -static void SetSysClock(void) -{ - __IO uint32_t StartUpCounter = 0, HSEStatus = 0; - - /* SYSCLK, HCLK, PCLK configuration ----------------------------------------*/ -#if defined (PLL_SOURCE_HSI) - /* At this stage the HSI is already enabled */ - - /* Enable Prefetch Buffer and set Flash Latency */ - FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1; - - /* PLL configuration = (HSI/2) * 12 = ~48 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL12); - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) - { - } -#else - #if defined (PLL_SOURCE_HSE) - /* Enable HSE */ - RCC->CR |= ((uint32_t)RCC_CR_HSEON); - #elif defined (PLL_SOURCE_HSE_BYPASS) - /* HSE oscillator bypassed with external clock */ - RCC->CR |= (uint32_t)(RCC_CR_HSEON | RCC_CR_HSEBYP); - #endif /* PLL_SOURCE_HSE */ - - /* Wait till HSE is ready and if Time out is reached exit */ - do - { - HSEStatus = RCC->CR & RCC_CR_HSERDY; - StartUpCounter++; - } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); - - if ((RCC->CR & RCC_CR_HSERDY) != RESET) - { - HSEStatus = (uint32_t)0x01; - } - else - { - HSEStatus = (uint32_t)0x00; - } - - if (HSEStatus == (uint32_t)0x01) - { - /* Enable Prefetch Buffer and set Flash Latency */ - FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY; - - /* HCLK = SYSCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; - - /* PCLK = HCLK */ - RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1; - - /* PLL configuration = HSE * 6 = 48 MHz */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); - RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL6); - - /* Enable PLL */ - RCC->CR |= RCC_CR_PLLON; - - /* Wait till PLL is ready */ - while((RCC->CR & RCC_CR_PLLRDY) == 0) - { - } - - /* Select PLL as system clock source */ - RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); - RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; - - /* Wait till PLL is used as system clock source */ - while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) - { - } - } - else - { /* If HSE fails to start-up, the application will have wrong clock - configuration. User can add here some code to deal with this error */ - } -#endif /* PLL_SOURCE_HSI */ -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - diff --git a/system_stm32f0xx.h b/system_stm32f0xx.h deleted file mode 100644 --- a/system_stm32f0xx.h +++ /dev/null @@ -1,105 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32f0xx.h - * @author MCD Application Team - * @version V1.0.0 - * @date 23-March-2012 - * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Header File. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2012 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32f0xx_system - * @{ - */ - -/** - * @brief Define to prevent recursive inclusion - */ -#ifndef __SYSTEM_STM32F0XX_H -#define __SYSTEM_STM32F0XX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/** @addtogroup STM32F0xx_System_Includes - * @{ - */ - -/** - * @} - */ - - -/** @addtogroup STM32F0xx_System_Exported_types - * @{ - */ - -extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Exported_Constants - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Exported_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32F0xx_System_Exported_Functions - * @{ - */ - -extern void SystemInit(void); -extern void SystemCoreClockUpdate(void); -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /*__SYSTEM_STM32F0XX_H */ - -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -