# HG changeset patch
# User Ethan Zonca <ez@ethanzonca.com>
# Date 2015-01-03 00:12:55
# Node ID a3acc7c3a0630bde8e2f525681c9d8d407b0ba31
# Parent  9336fdac7c05fc85f829f89120d36370da7ecf1e

Removed old system files, fixed _it files

diff --git a/Makefile b/Makefile
--- a/Makefile
+++ b/Makefile
@@ -33,9 +33,8 @@ ASRC=startup_stm32f042.s
 
 # Project Source Files
 SRC=main.c
-SRC+=stm32l1xx_it.c
-SRC+=system_stm32l1xx.c
-SRC+=stm32l100c_discovery.c
+SRC+=stm32f0xx_it.c
+SRC+=system_stm32f0xx.c
 SRC+=ssd1306.c
 SRC+=eeprom_min.c
 SRC+=gpio.c
diff --git a/platform_config.h b/platform_config.h
--- a/platform_config.h
+++ b/platform_config.h
@@ -31,7 +31,7 @@
 #define __PLATFORM_CONFIG_H
 
 /* Includes ------------------------------------------------------------------*/
-#include "stm32l1xx.h"
+#include "stm32f0xx.h"
 
 /* Exported types ------------------------------------------------------------*/
 
diff --git a/stm32f0xx_conf.h b/stm32f0xx_conf.h
new file mode 100644
--- /dev/null
+++ b/stm32f0xx_conf.h
@@ -0,0 +1,81 @@
+/**
+  ******************************************************************************
+  * @file    stm32F0xx_conf.h
+  * @author  MCD Application Team
+  * @version V1.0.0
+  * @date    23-March-2012
+  * @brief   Library configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
+  *
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+  * You may not use this file except in compliance with the License.
+  * You may obtain a copy of the License at:
+  *
+  *        http://www.st.com/software_license_agreement_liberty_v2
+  *
+  * Unless required by applicable law or agreed to in writing, software 
+  * distributed under the License is distributed on an "AS IS" BASIS, 
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  * See the License for the specific language governing permissions and
+  * limitations under the License.
+  *
+  ******************************************************************************
+  */ 
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F0XX_CONF_H
+#define __STM32F0XX_CONF_H
+
+/* Includes ------------------------------------------------------------------*/
+/* Comment the line below to disable peripheral header file inclusion */
+/* #include "stm32f0xx_adc.h" */
+#include "stm32f0xx_cec.h" 
+#include "stm32f0xx_crc.h"
+#include "stm32f0xx_comp.h" 
+#include "stm32f0xx_dac.h" 
+#include "stm32f0xx_dbgmcu.h"
+#include "stm32f0xx_dma.h" 
+#include "stm32f0xx_exti.h" 
+#include "stm32f0xx_flash.h"
+#include "stm32f0xx_gpio.h" 
+#include "stm32f0xx_syscfg.h" 
+#include "stm32f0xx_i2c.h"
+#include "stm32f0xx_iwdg.h"
+#include "stm32f0xx_pwr.h" 
+#include "stm32f0xx_rcc.h" 
+#include "stm32f0xx_rtc.h" 
+#include "stm32f0xx_spi.h"
+#include "stm32f0xx_tim.h"
+#include "stm32f0xx_usart.h" 
+#include "stm32f0xx_wwdg.h" 
+#include "stm32f0xx_misc.h"  /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Uncomment the line below to expanse the "assert_param" macro in the 
+   Standard Peripheral Library drivers code */
+/* #define USE_FULL_ASSERT    1 */
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function which reports 
+  *         the name of the source file and the source line number of the call 
+  *         that failed. If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t* file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0)
+#endif /* USE_FULL_ASSERT */
+
+#endif /* __STM32F0XX_CONF_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/stm32l1xx_it.c b/stm32f0xx_it.c
rename from stm32l1xx_it.c
rename to stm32f0xx_it.c
--- a/stm32l1xx_it.c
+++ b/stm32f0xx_it.c
@@ -1,6 +1,6 @@
 /**
   ******************************************************************************
-  * @file    stm32l1xx_it.c 
+  * @file    stm32f0xx_it.c 
   * @author  MCD Application Team
   * @version V1.0.0
   * @date    29-July-2013
@@ -29,14 +29,10 @@
 
 /* Includes ------------------------------------------------------------------*/
 #include "hw_config.h"
-#include "stm32l1xx_it.h"
+#include "stm32f0xx_it.h"
 #include "main.h"
-#include "usb_lib.h"
-#include "usb_istr.h"
-
-/** @addtogroup STM32L100C-Discovery_Demo
-  * @{
-  */
+//#include "usb_lib.h"
+//#include "usb_istr.h"
 
 /* Private typedef -----------------------------------------------------------*/
 /* Private define ------------------------------------------------------------*/
@@ -160,10 +156,10 @@ void SysTick_Handler(void)
 * Output         : None
 * Return         : None
 *******************************************************************************/
-void USB_LP_IRQHandler(void)
-{
-  USB_Istr();
-}
+//void USB_LP_IRQHandler(void)
+//{
+//  USB_Istr();
+//}
 
 /*******************************************************************************
 * Function Name  : USB_FS_WKUP_IRQHandler
@@ -172,10 +168,10 @@ void USB_LP_IRQHandler(void)
 * Output         : None
 * Return         : None
 *******************************************************************************/
-void USB_FS_WKUP_IRQHandler(void)
-{
-  EXTI_ClearITPendingBit(EXTI_Line18);
-}
+//void USB_FS_WKUP_IRQHandler(void)
+//{
+//  EXTI_ClearITPendingBit(EXTI_Line18);
+//}
 
 
 
@@ -198,12 +194,5 @@ void USB_FS_WKUP_IRQHandler(void)
 {
 }*/
 
-/**
-  * @}
-  */ 
-
-
-
-
 
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/stm32f0xx_it.h b/stm32f0xx_it.h
new file mode 100644
--- /dev/null
+++ b/stm32f0xx_it.h
@@ -0,0 +1,66 @@
+/**
+  ******************************************************************************
+  * @file    stm32f0xx_it.h 
+  * @author  MCD Application Team
+  * @version V1.0.0
+  * @date    29-July-2013
+  * @brief   This file contains the headers of the interrupt handlers.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
+  *
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+  * You may not use this file except in compliance with the License.
+  * You may obtain a copy of the License at:
+  *
+  *        http://www.st.com/software_license_agreement_liberty_v2
+  *
+  * Unless required by applicable law or agreed to in writing, software 
+  * distributed under the License is distributed on an "AS IS" BASIS, 
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  * See the License for the specific language governing permissions and
+  * limitations under the License.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __STM32F0xx_IT_H
+#define __STM32F0xx_IT_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif 
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f0xx.h"
+#include "platform_config.h"
+
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+void USBWakeUp_IRQHandler(void);
+void USB_FS_WKUP_IRQHandler(void);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __STM32F0xx_IT_H */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/stm32l1xx_it.h b/stm32l1xx_it.h
deleted file mode 100644
--- a/stm32l1xx_it.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32l1xx_it.h 
-  * @author  MCD Application Team
-  * @version V1.0.0
-  * @date    29-July-2013
-  * @brief   This file contains the headers of the interrupt handlers.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
-  *
-  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
-  * You may not use this file except in compliance with the License.
-  * You may obtain a copy of the License at:
-  *
-  *        http://www.st.com/software_license_agreement_liberty_v2
-  *
-  * Unless required by applicable law or agreed to in writing, software 
-  * distributed under the License is distributed on an "AS IS" BASIS, 
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-  * See the License for the specific language governing permissions and
-  * limitations under the License.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32L1xx_IT_H
-#define __STM32L1xx_IT_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-
-/* Includes ------------------------------------------------------------------*/
-#include "stm32l1xx.h"
-#include "platform_config.h"
-
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-/* Exported macro ------------------------------------------------------------*/
-/* Exported functions ------------------------------------------------------- */
-
-void NMI_Handler(void);
-void HardFault_Handler(void);
-void MemManage_Handler(void);
-void BusFault_Handler(void);
-void UsageFault_Handler(void);
-void SVC_Handler(void);
-void DebugMon_Handler(void);
-void PendSV_Handler(void);
-void SysTick_Handler(void);
-void USBWakeUp_IRQHandler(void);
-void USB_FS_WKUP_IRQHandler(void);
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32L1xx_IT_H */
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/system_stm32l1xx.c b/system_stm32l1xx.c
deleted file mode 100644
--- a/system_stm32l1xx.c
+++ /dev/null
@@ -1,399 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    system_stm32l1xx.c
-  * @author  MCD Application Team
-  * @version V1.2.0
-  * @date    11-July-2014
-  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
-  *          This file contains the system clock configuration for STM32L1xx Ultra
-  *          Low power devices, and is generated by the clock configuration 
-  *          tool  STM32L1xx_Clock_Configuration_V1.2.0.xls
-  *             
-  * 1.  This file provides two functions and one global variable to be called from 
-  *     user application:
-  *      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
-  *                      and Divider factors, AHB/APBx prescalers and Flash settings),
-  *                      depending on the configuration made in the clock xls tool. 
-  *                      This function is called at startup just after reset and 
-  *                      before branch to main program. This call is made inside
-  *                      the "startup_stm32l1xx_xx.s" file.
-  *                        
-  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
-  *                                  by the user application to setup the SysTick 
-  *                                  timer or configure other parameters.
-  *                                     
-  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
-  *                                 be called whenever the core clock is changed
-  *                                 during program execution.   
-  *      
-  * 2. After each device reset the MSI (2.1 MHz Range) is used as system clock source.
-  *    Then SystemInit() function is called, in "startup_stm32l1xx_xx.s" file, to
-  *    configure the system clock before to branch to main program.    
-  *    
-  * 3. If the system clock source selected by user fails to startup, the SystemInit()
-  *    function will do nothing and MSI still used as system clock source. User can 
-  *    add some code to deal with this issue inside the SetSysClock() function.       
-  * 
-  * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define
-  *    in "stm32l1xx.h" file. When HSE is used as system clock source, directly or
-  *    through PLL, and you are using different crystal you have to adapt the HSE
-  *    value to your own configuration.
-  * 
-  * 5. This file configures the system clock as follows:  
-  *=============================================================================
-  *                         System Clock Configuration
-  *=============================================================================
-  *        System Clock source          | PLL(HSE)
-  *----------------------------------------------------------------------------- 
-  *        SYSCLK                       | 32000000 Hz
-  *----------------------------------------------------------------------------- 
-  *        HCLK                         | 32000000 Hz
-  *----------------------------------------------------------------------------- 
-  *        AHB Prescaler                | 1
-  *----------------------------------------------------------------------------- 
-  *        APB1 Prescaler               | 1
-  *----------------------------------------------------------------------------- 
-  *        APB2 Prescaler               | 1
-  *----------------------------------------------------------------------------- 
-  *        HSE Frequency                | 4000000 Hz
-  *----------------------------------------------------------------------------- 
-  *        PLL DIV                      | 3
-  *----------------------------------------------------------------------------- 
-  *        PLL MUL                      | 24
-  *----------------------------------------------------------------------------- 
-  *        VDD                          | 3.3 V
-  *----------------------------------------------------------------------------- 
-  *        Vcore                        | 1.8 V (Range 1)
-  *----------------------------------------------------------------------------- 
-  *        Flash Latency                | 1 WS
-  *----------------------------------------------------------------------------- 
-  *        Require 48MHz for USB clock  | Enabled
-  *----------------------------------------------------------------------------- 
-  *=============================================================================
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
-  *
-  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
-  * You may not use this file except in compliance with the License.
-  * You may obtain a copy of the License at:
-  *
-  *        http://www.st.com/software_license_agreement_liberty_v2
-  *
-  * Unless required by applicable law or agreed to in writing, software 
-  * distributed under the License is distributed on an "AS IS" BASIS, 
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-  * See the License for the specific language governing permissions and
-  * limitations under the License.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l1xx_system
-  * @{
-  */  
-  
-/** @addtogroup STM32L1xx_System_Private_Includes
-  * @{
-  */
-
-#include "stm32l1xx.h"
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L1xx_System_Private_TypesDefinitions
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L1xx_System_Private_Defines
-  * @{
-  */
-
-/*!< Uncomment the following line if you need to relocate your vector Table in
-     Internal SRAM. */ 
-/* #define VECT_TAB_SRAM */
-#define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field. 
-                                  This value must be a multiple of 0x200. */
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L1xx_System_Private_Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L1xx_System_Private_Variables
-  * @{
-  */
-uint32_t SystemCoreClock    = 32000000;
-__I uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
-__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L1xx_System_Private_FunctionPrototypes
-  * @{
-  */
-
-static void SetSysClock(void);
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L1xx_System_Private_Functions
-  * @{
-  */
-
-/**
-  * @brief  Setup the microcontroller system.
-  *         Initialize the Embedded Flash Interface, the PLL and update the 
-  *         SystemCoreClock variable.
-  * @param  None
-  * @retval None
-  */
-void SystemInit (void)
-{
-  /*!< Set MSION bit */
-  RCC->CR |= (uint32_t)0x00000100;
-
-  /*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */
-  RCC->CFGR &= (uint32_t)0x88FFC00C;
-  
-  /*!< Reset HSION, HSEON, CSSON and PLLON bits */
-  RCC->CR &= (uint32_t)0xEEFEFFFE;
-
-  /*!< Reset HSEBYP bit */
-  RCC->CR &= (uint32_t)0xFFFBFFFF;
-
-  /*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */
-  RCC->CFGR &= (uint32_t)0xFF02FFFF;
-
-  /*!< Disable all interrupts */
-  RCC->CIR = 0x00000000;
-
-  /* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */
-  SetSysClock();
-
-#ifdef VECT_TAB_SRAM
-  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
-#else
-  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
-#endif
-}
-
-/**
-  * @brief  Update SystemCoreClock according to Clock Register Values
-  *         The SystemCoreClock variable contains the core clock (HCLK), it can
-  *         be used by the user application to setup the SysTick timer or configure
-  *         other parameters.
-  *           
-  * @note   Each time the core clock (HCLK) changes, this function must be called
-  *         to update SystemCoreClock variable value. Otherwise, any configuration
-  *         based on this variable will be incorrect.         
-  *     
-  * @note   - The system frequency computed by this function is not the real 
-  *           frequency in the chip. It is calculated based on the predefined 
-  *           constant and the selected clock source:
-  *             
-  *           - If SYSCLK source is MSI, SystemCoreClock will contain the MSI 
-  *             value as defined by the MSI range.
-  *                                   
-  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
-  *                                              
-  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
-  *                          
-  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) 
-  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
-  *         
-  *         (*) HSI_VALUE is a constant defined in stm32l1xx.h file (default value
-  *             16 MHz) but the real value may vary depending on the variations
-  *             in voltage and temperature.   
-  *    
-  *         (**) HSE_VALUE is a constant defined in stm32l1xx.h file (default value
-  *              8 MHz), user has to ensure that HSE_VALUE is same as the real
-  *              frequency of the crystal used. Otherwise, this function may
-  *              have wrong result.
-  *                
-  *         - The result of this function could be not correct when using fractional
-  *           value for HSE crystal.  
-  * @param  None
-  * @retval None
-  */
-void SystemCoreClockUpdate (void)
-{
-  uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0;
-
-  /* Get SYSCLK source -------------------------------------------------------*/
-  tmp = RCC->CFGR & RCC_CFGR_SWS;
-  
-  switch (tmp)
-  {
-    case 0x00:  /* MSI used as system clock */
-      msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
-      SystemCoreClock = (32768 * (1 << (msirange + 1)));
-      break;
-    case 0x04:  /* HSI used as system clock */
-      SystemCoreClock = HSI_VALUE;
-      break;
-    case 0x08:  /* HSE used as system clock */
-      SystemCoreClock = HSE_VALUE;
-      break;
-    case 0x0C:  /* PLL used as system clock */
-      /* Get PLL clock source and multiplication factor ----------------------*/
-      pllmul = RCC->CFGR & RCC_CFGR_PLLMUL;
-      plldiv = RCC->CFGR & RCC_CFGR_PLLDIV;
-      pllmul = PLLMulTable[(pllmul >> 18)];
-      plldiv = (plldiv >> 22) + 1;
-      
-      pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
-
-      if (pllsource == 0x00)
-      {
-        /* HSI oscillator clock selected as PLL clock entry */
-        SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv);
-      }
-      else
-      {
-        /* HSE selected as PLL clock entry */
-        SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv);
-      }
-      break;
-    default: /* MSI used as system clock */
-      msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
-      SystemCoreClock = (32768 * (1 << (msirange + 1)));
-      break;
-  }
-  /* Compute HCLK clock frequency --------------------------------------------*/
-  /* Get HCLK prescaler */
-  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
-  /* HCLK clock frequency */
-  SystemCoreClock >>= tmp;
-}
-
-/**
-  * @brief  Configures the System clock frequency, AHB/APBx prescalers and Flash 
-  *         settings.
-  * @note   This function should be called only once the RCC clock configuration  
-  *         is reset to the default reset state (done in SystemInit() function).             
-  * @param  None
-  * @retval None
-  */
-uint8_t clock_fail = 0;
-
-static void SetSysClock(void)
-{
-  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
-  
-  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
-  /* Enable HSE */
-  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
- 
-  /* Wait till HSE is ready and if Time out is reached exit */
-  do
-  {
-    HSEStatus = RCC->CR & RCC_CR_HSERDY;
-    StartUpCounter++;
-  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-
-  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
-  {
-    HSEStatus = (uint32_t)0x01;
-  }
-  else
-  {
-    HSEStatus = (uint32_t)0x00;
-  }
-  
-  if (HSEStatus == (uint32_t)0x01)
-  {
-    /* Enable 64-bit access */
-    FLASH->ACR |= FLASH_ACR_ACC64;
-    
-    /* Enable Prefetch Buffer */
-    FLASH->ACR |= FLASH_ACR_PRFTEN;
-
-    /* Flash 1 wait state */
-    FLASH->ACR |= FLASH_ACR_LATENCY;
-    
-    /* Power enable */
-    RCC->APB1ENR |= RCC_APB1ENR_PWREN;
-  
-    /* Select the Voltage Range 1 (1.8 V) */
-    PWR->CR = PWR_CR_VOS_0;
-  
-    /* Wait Until the Voltage Regulator is ready */
-    while((PWR->CSR & PWR_CSR_VOSF) != RESET)
-    {
-    }
-        
-    /* HCLK = SYSCLK /1*/
-    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
-  
-    /* PCLK2 = HCLK /1*/
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
-    
-    /* PCLK1 = HCLK /1*/
-    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
-    
-    /*  PLL configuration */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL |
-                                        RCC_CFGR_PLLDIV));
-    RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMUL24 | RCC_CFGR_PLLDIV3);
-
-    /* Enable PLL */
-    RCC->CR |= RCC_CR_PLLON;
-
-    /* Wait till PLL is ready */
-    while((RCC->CR & RCC_CR_PLLRDY) == 0)
-    {
-    }
-        
-    /* Select PLL as system clock source */
-    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
-
-    /* Wait till PLL is used as system clock source */
-    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
-    {
-    }
-  }
-  else
-  {
-	clock_fail = 1;
-//	while(1);
-    /* If HSE fails to start-up, the application will have wrong clock
-       configuration. User can add here some code to deal with this error */
-  }
-}
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/**
-  * @}
-  */
-
-/******************* (C) COPYRIGHT 2013 STMicroelectronics *****END OF FILE****/
-
diff --git a/system_stm32l1xx.h b/system_stm32l1xx.h
deleted file mode 100644
--- a/system_stm32l1xx.h
+++ /dev/null
@@ -1,106 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    system_stm32l1xx.h
-  * @author  MCD Application Team
-  * @version V1.2.1
-  * @date    19-June-2013
-  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
-  *
-  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
-  * You may not use this file except in compliance with the License.
-  * You may obtain a copy of the License at:
-  *
-  *        http://www.st.com/software_license_agreement_liberty_v2
-  *
-  * Unless required by applicable law or agreed to in writing, software 
-  * distributed under the License is distributed on an "AS IS" BASIS, 
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-  * See the License for the specific language governing permissions and
-  * limitations under the License.
-  *
-  ******************************************************************************
-  */
-
-/** @addtogroup CMSIS
-  * @{
-  */
-
-/** @addtogroup stm32l1xx_system
-  * @{
-  */  
-  
-/**
-  * @brief Define to prevent recursive inclusion
-  */
-#ifndef __SYSTEM_STM32L1XX_H
-#define __SYSTEM_STM32L1XX_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif 
-
-/** @addtogroup STM32L1xx_System_Includes
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-
-/** @addtogroup STM32L1xx_System_Exported_types
-  * @{
-  */
-
-extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
-
-extern uint8_t clock_fail;
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L1xx_System_Exported_Constants
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L1xx_System_Exported_Macros
-  * @{
-  */
-
-/**
-  * @}
-  */
-
-/** @addtogroup STM32L1xx_System_Exported_Functions
-  * @{
-  */
-  
-extern void SystemInit(void);
-extern void SystemCoreClockUpdate(void);
-/**
-  * @}
-  */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /*__SYSTEM_STM32L1XX_H */
-
-/**
-  * @}
-  */
-  
-/**
-  * @}
-  */  
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/