# HG changeset patch # User Ethan Zonca # Date 2015-03-29 20:58:14 # Node ID b5b1fc08b294390d4cd0b38ba54d1d7dda9cd3d3 # Parent cfa4fd71c861a0c5b5bc7560d49f8d42f1896e33 Added virtual serial port periodic transmission of temperature. Trying out bootloader code, but still doesn't work. diff --git a/config.h b/config.h --- a/config.h +++ b/config.h @@ -1,7 +1,7 @@ #ifndef CONFIG_H #define CONFIG_H - +#define VCP_TX_FREQ 1000 #define SSR_PERIOD 200 #define LED_POWER GPIOF,GPIO_PIN_0 diff --git a/flash.sh b/flash.sh --- a/flash.sh +++ b/flash.sh @@ -2,3 +2,7 @@ cd build st-flash write main.bin 0x8000000 cd .. + + +# USB DFU: +# sudo dfu-util -a 0 -d 0483:df11 -s 0x08000000:leave -D build/main.bin diff --git a/main.c b/main.c --- a/main.c +++ b/main.c @@ -231,20 +231,6 @@ void update_temp() { temp = temp_pre * signint; } } - - // Print temp to cdc -/* - CDC_Transmit_FS("Temp: ", 6); - char tempstr[6]; - zitoa(temp, tempstr); - CDC_Transmit_FS(tempstr, sizeof(tempstr)); - - CDC_Transmit_FS("\r\n", 2); - CDC_Transmit_FS("\r\n", 2); - CDC_Transmit_FS("\r\n", 2); - CDC_Transmit_FS("\r\n", 2); - CDC_Transmit_FS("\r\n", 2); -*/ } @@ -301,6 +287,7 @@ int16_t update_pid(uint16_t k_p, uint16_ uint32_t last_ssr_on = 0; +uint32_t last_vcp_tx = 0; uint32_t last_led = 0; int32_t setpoint = 0; int16_t ssr_output = 0; // Duty cycle of ssr, 0 to SSR_PERIOD @@ -352,6 +339,18 @@ void process() { HAL_GPIO_WritePin(SSR_PIN, 0); } + + if(ticks - last_vcp_tx > VCP_TX_FREQ) + { + // Print temp to cdc + char tempstr[6]; + itoa_fp(temp, temp_frac, tempstr); + + while(CDC_Transmit_FS(tempstr, sizeof(tempstr)) == USBD_BUSY); + while(CDC_Transmit_FS("\r\n", 2) == USBD_BUSY); + + last_vcp_tx = ticks; + } } @@ -536,7 +535,13 @@ void machine() ssd1306_clearscreen(); ssd1306_DrawString("Entering Bootloader", 1, 0); ssd1306_DrawString("(hopefully)", 2, 0); - HAL_Delay(1000); + //HAL_Delay(1000); + HAL_RCC_DeInit(); + SysTick->CTRL = 0; + SysTick->LOAD = 0; + SysTick->VAL = 0; + __set_PRIMASK(1); + __set_MSP(0x200010000); *((unsigned long *)0x200017F0) = 0xDEADBEEF; // 6KB STM32F042 NVIC_SystemReset(); diff --git a/startup_stm32f042x6.s b/startup_stm32f042x6.s --- a/startup_stm32f042x6.s +++ b/startup_stm32f042x6.s @@ -84,15 +84,33 @@ Reset_Handler: /* Boot into bootloader */ Reboot_Loader: - ldr r0, =0x1FFFF6A6 /* Address of bootloader on f042 from CD00167594 pg 15 table 3 */ - /* This replaces ldr sp, [r0, #0] which doesn't work on m0 */ - // Set stack pointer - ldr r1, [r0, #0] - mov sp, r1 + LDR R0, =0x40021018 // RCC_APB2ENR (+0x18) + LDR R1, =0x00000001 // ENABLE SYSCFG CLOCK + STR R1, [R0, #0] + LDR R0, =0x40010000 // SYSCFG_CFGR1 (+0x00) + LDR R1, =0x00000001 // MAP ROM AT ZERO + STR R1, [R0, #0] + // LDR R0, =0x1FFFEC00 ; ROM BASE (STM32F03x) + LDR R0, =0x1FFFC400 // ROM BASE (STM32F04x) + // LDR R0, =0x1FFFEC00 ; ROM BASE (STM32F05x) + // LDR R0, =0x1FFFC800 ; ROM BASE (STM32F07x) + // LDR R0, =0x1FFFD800 ; ROM BASE (STM32F09x) + LDR R1, [R0, #0] // SP @ +0 + MOV SP, R1 + LDR R0, [R0, #4] // PC @ +4 + BX R0 + + + // On reset, SP=value at address 0x0 +// ldr r0, =0x00000000 +// ldr r0, [r0, #0] +// mov sp, r0 + +// ldr r0, =0x1FFFC800 /* Address of bootloader on f042 from CD00167594 pg 15 table 3 */ // Branch to bootloader - ldr r0, [r0, #4] - bx r0 +// ldr r0, [r0, #4] +// bx r0 CopyDataInit: diff --git a/usbd_cdc_if.c b/usbd_cdc_if.c --- a/usbd_cdc_if.c +++ b/usbd_cdc_if.c @@ -290,10 +290,13 @@ uint8_t CDC_Transmit_FS(uint8_t* Buf, ui /* USER CODE BEGIN 8 */ uint16_t i; + + // Zero out user TX buffer (EMZ FIXME: why bother?) for (i=0; i < sizeof(UserTxBufferFS); i++) { UserTxBufferFS[i] = 0; } + // Copy input buff to user TX buffer for (i=0; i < Len; i++) { UserTxBufferFS[i] = Buf[i]; }