therm Changeset - af534c6b892a · protofusion repositories

Changeset - af534c6b892a

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Ethan Zonca - 10 years ago 2014-08-13 13:42:20
ezonca@sealandaire.com

Fixed pin configurations, SPI now clocks correctly and garbage shows up on the OLED display

2 files changed with 75 insertions and 50 deletions:

main.c

system_stm32l1xx.c

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main.c

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@@ @@ -28,59 +28,59 @@ void init_spi(); @@
 void process();
 void machine();
 int main(void)
+{
     // Init clocks
     SystemInit();
     init_gpio();
     Set_USBClock();
     USB_Interrupts_Config();
     GPIO_SetBits(LED_POWER);
     //USB_Init(); // freezes here... maybe clock issue?
     RCC_ClocksTypeDef RCC_Clocks;
     // SysTick end of count event each 1ms
     RCC_GetClocksFreq(&RCC_Clocks);
     SysTick_Config(RCC_Clocks.HCLK_Frequency / 1000);
     GPIO_ResetBits(LED_STAT);
     Delay(100);
     //ssd1306_Init();
     //ssd1306_DrawPoint(3,3,1);
     //ssd1306_DrawPoint(5,5,0);
     GPIO_SetBits(LED_POWER);
     Delay(500);
     GPIO_ResetBits(LED_POWER);
     init_spi();
     ssd1306_Init();
     ssd1306_DrawPoint(3,3,1);
     ssd1306_DrawPoint(5,5,0);
     while(1)
+   {
         // Process sensor inputs [TODO: 5hz?]
         process();
         // Run state machine [TODO: 50hz?]
         machine();
         // probably just passed the actual port
         // TODO: Grab buttonpresses with interrupts
         uint8_t sw_btn = GPIO_ReadInputDataBit(SW_BTN);
         uint8_t sw_up = GPIO_ReadInputDataBit(SW_UP);
         uint8_t sw_down = GPIO_ReadInputDataBit(SW_DOWN);
         uint8_t sw_left = GPIO_ReadInputDataBit(SW_LEFT);
         uint8_t sw_right = GPIO_ReadInputDataBit(SW_RIGHT);
         SPI_I2S_SendData(SPI2,0xFA);
         SPI_I2S_SendData(SPI1,0xFA);
         if(!GPIO_ReadInputDataBit(GPIOB, GPIO_Pin_3)) {
             GPIO_ToggleBits(LED_STAT);
+        }
         GPIO_SetBits(LED_POWER);
@@ @@ -385,77 +385,88 @@ void init_gpio(void) { @@
   /*Configure GPIO pin : PA */
   GPIO_InitStruct.GPIO_Pin = GPIO_Pin_15;
   GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
   GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
   GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
   GPIO_InitStruct.GPIO_Speed = GPIO_Speed_400KHz;
   GPIO_Init(GPIOA, &GPIO_InitStruct);
   /*Configure GPIO pin : PB */
   GPIO_InitStruct.GPIO_Pin = GPIO_Pin_3|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6
                           |GPIO_Pin_7;
   GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
   GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
   GPIO_Init(GPIOB, &GPIO_InitStruct);
   /** SPI1 GPIO Configuration
   PA5   ------> SPI1_SCK
   PA7   ------> SPI1_MOSI
   */
   /*Enable or disable the AHB peripheral clock */
   RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
   /*Configure GPIO pin : PA */
+  /*Configure GPIO pin : PA: MOSI,SCK */
   GPIO_InitStruct.GPIO_Pin = GPIO_Pin_5|GPIO_Pin_7;
-  GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
+  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
   GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
-  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_400KHz;
+  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz;
   GPIO_Init(GPIOA, &GPIO_InitStruct);
   /*Configure GPIO pin alternate function */
   GPIO_PinAFConfig(GPIOA, GPIO_PinSource5, GPIO_AF_SPI1);
   /*Configure GPIO pin alternate function */
   GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_SPI1);
   /** SPI2 GPIO Configuration
   PB13   ------> SPI2_SCK
   PB14   ------> SPI2_MISO
   PB15   ------> SPI2_MOSI
   */
   /*Enable or disable the AHB peripheral clock */
   RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
   /*Configure GPIO pin : PB */
   GPIO_InitStruct.GPIO_Pin = GPIO_Pin_13|GPIO_Pin_14|GPIO_Pin_15;
   GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
 // SPI PINSSS
   /*Configure GPIO pin : PB, MOSI, SCK */
   GPIO_InitStruct.GPIO_Pin = GPIO_Pin_13|GPIO_Pin_15;
   GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
   GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
-  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_400KHz;
+  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz;
   GPIO_Init(GPIOB, &GPIO_InitStruct);
 // MISO
   GPIO_InitStruct.GPIO_Pin = GPIO_Pin_14;
   GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
   GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
   GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz;
   GPIO_Init(GPIOB, &GPIO_InitStruct);
   /*Configure GPIO pin alternate function */
   GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_SPI2);
   /*Configure GPIO pin alternate function */
   GPIO_PinAFConfig(GPIOB, GPIO_PinSource14, GPIO_AF_SPI2);
   /*Configure GPIO pin alternate function */
   GPIO_PinAFConfig(GPIOB, GPIO_PinSource15, GPIO_AF_SPI2);
   /** USB GPIO Configuration
   PA11   ------> USB_DM
   PA12   ------> USB_DP
   */
   /*Enable or disable the AHB peripheral clock */
   RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
   /*Configure GPIO pin : PA */
   GPIO_InitStruct.GPIO_Pin = GPIO_Pin_11|GPIO_Pin_12;
   GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
   GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
   GPIO_InitStruct.GPIO_Speed = GPIO_Speed_400KHz;
   GPIO_Init(GPIOA, &GPIO_InitStruct);
+}

system_stm32l1xx.c

➞

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@@ @@ -22,73 +22,73 @@ @@
   *                                  by the user application to setup the SysTick
   *                                  timer or configure other parameters.
+  *
   *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
   *                                 be called whenever the core clock is changed
   *                                 during program execution.
+  *
   * 2. After each device reset the MSI (2.1 MHz Range) is used as system clock source.
   *    Then SystemInit() function is called, in "startup_stm32l1xx_xx.s" file, to
   *    configure the system clock before to branch to main program.
+  *
   * 3. If the system clock source selected by user fails to startup, the SystemInit()
   *    function will do nothing and MSI still used as system clock source. User can
   *    add some code to deal with this issue inside the SetSysClock() function.
+  *
   * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define
   *    in "stm32l1xx.h" file. When HSE is used as system clock source, directly or
   *    through PLL, and you are using different crystal you have to adapt the HSE
   *    value to your own configuration.
+  *
   * 5. This file configures the system clock as follows:
   *=============================================================================
   *                         System Clock Configuration
   *=============================================================================
-  *        System clock source          | HSI
+  *        System Clock source          | PLL(HSE)
   *-----------------------------------------------------------------------------
-  *        SYSCLK                       | 16000000 Hz
+  *        SYSCLK                       | 32000000 Hz
   *-----------------------------------------------------------------------------
-  *        HCLK                         | 8000000 Hz
+  *        HCLK                         | 32000000 Hz
   *-----------------------------------------------------------------------------
-  *        AHB Prescaler                | 2
+  *        AHB Prescaler                | 1
   *-----------------------------------------------------------------------------
   *        APB1 Prescaler               | 1
   *-----------------------------------------------------------------------------
   *        APB2 Prescaler               | 1
   *-----------------------------------------------------------------------------
-  *        HSE Frequency                | 8000000 Hz
+  *        HSE Frequency                | 4000000 Hz
   *-----------------------------------------------------------------------------
-  *        PLL DIV                      | Not Used
+  *        PLL DIV                      | 3
   *-----------------------------------------------------------------------------
-  *        PLL MUL                      | Not Used
+  *        PLL MUL                      | 24
   *-----------------------------------------------------------------------------
   *        VDD                          | 3.3 V
   *-----------------------------------------------------------------------------
-  *        Vcore                        | 1.5 V (Range 2)
+  *        Vcore                        | 1.8 V (Range 1)
   *-----------------------------------------------------------------------------
-  *        Flash Latency                | 0 WS
+  *        Flash Latency                | 1 WS
   *-----------------------------------------------------------------------------
-  *        Require 48MHz for USB clock  | Disabled
+  *        Require 48MHz for USB clock  | Enabled
   *-----------------------------------------------------------------------------
   *=============================================================================
   * @attention
+  *
   * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>
+  *
   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
   * You may not use this file except in compliance with the License.
   * You may obtain a copy of the License at:
+  *
   *        http://www.st.com/software_license_agreement_liberty_v2
+  *
   * Unless required by applicable law or agreed to in writing, software
   * distributed under the License is distributed on an "AS IS" BASIS,
   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
   * See the License for the specific language governing permissions and
   * limitations under the License.
+  *
   ******************************************************************************
   */
 /** @addtogroup CMSIS
   * @{
   */
@@ @@ -118,49 +118,49 @@ @@
 /** @addtogroup STM32L1xx_System_Private_Defines
   * @{
   */
 /*!< Uncomment the following line if you need to relocate your vector Table in
      Internal SRAM. */
 /* #define VECT_TAB_SRAM */
 #define VECT_TAB_OFFSET  0x0 /*!< Vector Table base offset field.
                                   This value must be a multiple of 0x200. */
 /**
   * @}
   */
 /** @addtogroup STM32L1xx_System_Private_Macros
   * @{
   */
 /**
   * @}
   */
 /** @addtogroup STM32L1xx_System_Private_Variables
   * @{
   */
-uint32_t SystemCoreClock    = 16000000;
+uint32_t SystemCoreClock    = 32000000;
 __I uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
 __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 /**
   * @}
   */
 /** @addtogroup STM32L1xx_System_Private_FunctionPrototypes
   * @{
   */
 static void SetSysClock(void);
 /**
   * @}
   */
 /** @addtogroup STM32L1xx_System_Private_Functions
   * @{
   */
 /**
   * @brief  Setup the microcontroller system.
   *         Initialize the Embedded Flash Interface, the PLL and update the
@@ @@ -276,107 +276,121 @@ void SystemCoreClockUpdate (void) @@
+      }
       break;
     default: /* MSI used as system clock */
       msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;
       SystemCoreClock = (32768 * (1 << (msirange + 1)));
       break;
+  }
   /* Compute HCLK clock frequency --------------------------------------------*/
   /* Get HCLK prescaler */
   tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
   /* HCLK clock frequency */
   SystemCoreClock >>= tmp;
+}
 /**
   * @brief  Configures the System clock frequency, AHB/APBx prescalers and Flash
   *         settings.
   * @note   This function should be called only once the RCC clock configuration
   *         is reset to the default reset state (done in SystemInit() function).
   * @param  None
   * @retval None
   */
 static void SetSysClock(void)
+{
-  __IO uint32_t StartUpCounter = 0, HSIStatus = 0;
+  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
   /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
   /* Enable HSI */
   RCC->CR |= ((uint32_t)RCC_CR_HSION);
   /* Enable HSE */
   RCC->CR |= ((uint32_t)RCC_CR_HSEON);
-  /* Wait till HSI is ready and if Time out is reached exit */
+  /* Wait till HSE is ready and if Time out is reached exit */
   do
+  {
     HSIStatus = RCC->CR & RCC_CR_HSIRDY;
   } while((HSIStatus == 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT));
     HSEStatus = RCC->CR & RCC_CR_HSERDY;
     StartUpCounter++;
   } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-  if ((RCC->CR & RCC_CR_HSIRDY) != RESET)
+  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
+  {
-    HSIStatus = (uint32_t)0x01;
+    HSEStatus = (uint32_t)0x01;
+  }
   else
+  {
-    HSIStatus = (uint32_t)0x00;
+    HSEStatus = (uint32_t)0x00;
+  }
-  if (HSIStatus == (uint32_t)0x01)
+  if (HSEStatus == (uint32_t)0x01)
+  {
     /* Flash 0 wait state */
     FLASH->ACR &= ~FLASH_ACR_LATENCY;
     /* Enable 64-bit access */
     FLASH->ACR |= FLASH_ACR_ACC64;
     /* Disable Prefetch Buffer */
     FLASH->ACR &= ~FLASH_ACR_PRFTEN;
     /* Enable Prefetch Buffer */
     FLASH->ACR |= FLASH_ACR_PRFTEN;
     /* Disable 64-bit access */
     FLASH->ACR &= ~FLASH_ACR_ACC64;
     /* Flash 1 wait state */
     FLASH->ACR |= FLASH_ACR_LATENCY;
     /* Power enable */
     RCC->APB1ENR |= RCC_APB1ENR_PWREN;
     /* Select the Voltage Range 2 (1.5 V) */
     PWR->CR = PWR_CR_VOS_1;
     /* Select the Voltage Range 1 (1.8 V) */
     PWR->CR = PWR_CR_VOS_0;
     /* Wait Until the Voltage Regulator is ready */
     while((PWR->CSR & PWR_CSR_VOSF) != RESET)
+    {
+    }
     /* HCLK = SYSCLK /2*/
     RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV2;
     /* HCLK = SYSCLK /1*/
     RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
     /* PCLK2 = HCLK /1*/
     RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
     /* PCLK1 = HCLK /1*/
     RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
     /* Select HSI as system clock source */
     /*  PLL configuration */
     RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL |
                                         RCC_CFGR_PLLDIV));
     RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMUL24 | RCC_CFGR_PLLDIV3);
     /* Enable PLL */
     RCC->CR |= RCC_CR_PLLON;
     /* Wait till PLL is ready */
     while((RCC->CR & RCC_CR_PLLRDY) == 0)
+    {
+    }
     /* Select PLL as system clock source */
     RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSI;
+    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
     /* Wait till HSI is used as system clock source */
     while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_HSI)
     /* Wait till PLL is used as system clock source */
     while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
+    {
+    }
+  }
   else
+  {
     /* If HSI fails to start-up, the application will have wrong clock
 	while(1);
     /* If HSE fails to start-up, the application will have wrong clock
        configuration. User can add here some code to deal with this error */
+  }
+}
 /**
   * @}
   */
 /**
   * @}
   */
 /**
   * @}
   */
 /******************* (C) COPYRIGHT 2013 STMicroelectronics *****END OF FILE****/

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