therm Changeset - af534c6b892a · protofusion repositories

Changeset - af534c6b892a

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Ethan Zonca - 10 years ago 2014-08-13 13:42:20
ezonca@sealandaire.com

Fixed pin configurations, SPI now clocks correctly and garbage shows up on the OLED display

2 files changed with 75 insertions and 50 deletions:

main.c

system_stm32l1xx.c

0 comments (0 inline, 0 general)

main.c

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@@ @@ -49,17 +49,17 @@ int main(void) @@
     GPIO_ResetBits(LED_STAT);
     Delay(100);
     //ssd1306_Init();
     //ssd1306_DrawPoint(3,3,1);
     //ssd1306_DrawPoint(5,5,0);
     GPIO_SetBits(LED_POWER);
     Delay(500);
     GPIO_ResetBits(LED_POWER);
     init_spi();
     ssd1306_Init();
     ssd1306_DrawPoint(3,3,1);
     ssd1306_DrawPoint(5,5,0);
     while(1)
+   {
         // Process sensor inputs [TODO: 5hz?]
@@ @@ -406,11 +406,11 @@ void init_gpio(void) { @@
   /*Enable or disable the AHB peripheral clock */
   RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
   /*Configure GPIO pin : PA */
+  /*Configure GPIO pin : PA: MOSI,SCK */
   GPIO_InitStruct.GPIO_Pin = GPIO_Pin_5|GPIO_Pin_7;
-  GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
+  GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
   GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
-  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_400KHz;
+  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz;
   GPIO_Init(GPIOA, &GPIO_InitStruct);
   /*Configure GPIO pin alternate function */
@@ @@ -428,13 +428,24 @@ void init_gpio(void) { @@
   /*Enable or disable the AHB peripheral clock */
   RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
   /*Configure GPIO pin : PB */
   GPIO_InitStruct.GPIO_Pin = GPIO_Pin_13|GPIO_Pin_14|GPIO_Pin_15;
   GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
 // SPI PINSSS
   /*Configure GPIO pin : PB, MOSI, SCK */
   GPIO_InitStruct.GPIO_Pin = GPIO_Pin_13|GPIO_Pin_15;
   GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AF;
   GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
-  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_400KHz;
+  GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz;
   GPIO_Init(GPIOB, &GPIO_InitStruct);
 // MISO
   GPIO_InitStruct.GPIO_Pin = GPIO_Pin_14;
   GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
   GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
   GPIO_InitStruct.GPIO_Speed = GPIO_Speed_10MHz;
   GPIO_Init(GPIOB, &GPIO_InitStruct);
   /*Configure GPIO pin alternate function */
   GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_SPI2);

system_stm32l1xx.c

➞

Show inline comments

@@ @@ -43,31 +43,31 @@ @@
   *=============================================================================
   *                         System Clock Configuration
   *=============================================================================
-  *        System clock source          | HSI
+  *        System Clock source          | PLL(HSE)
   *-----------------------------------------------------------------------------
-  *        SYSCLK                       | 16000000 Hz
+  *        SYSCLK                       | 32000000 Hz
   *-----------------------------------------------------------------------------
-  *        HCLK                         | 8000000 Hz
+  *        HCLK                         | 32000000 Hz
   *-----------------------------------------------------------------------------
-  *        AHB Prescaler                | 2
+  *        AHB Prescaler                | 1
   *-----------------------------------------------------------------------------
   *        APB1 Prescaler               | 1
   *-----------------------------------------------------------------------------
   *        APB2 Prescaler               | 1
   *-----------------------------------------------------------------------------
-  *        HSE Frequency                | 8000000 Hz
+  *        HSE Frequency                | 4000000 Hz
   *-----------------------------------------------------------------------------
-  *        PLL DIV                      | Not Used
+  *        PLL DIV                      | 3
   *-----------------------------------------------------------------------------
-  *        PLL MUL                      | Not Used
+  *        PLL MUL                      | 24
   *-----------------------------------------------------------------------------
   *        VDD                          | 3.3 V
   *-----------------------------------------------------------------------------
-  *        Vcore                        | 1.5 V (Range 2)
+  *        Vcore                        | 1.8 V (Range 1)
   *-----------------------------------------------------------------------------
-  *        Flash Latency                | 0 WS
+  *        Flash Latency                | 1 WS
   *-----------------------------------------------------------------------------
-  *        Require 48MHz for USB clock  | Disabled
+  *        Require 48MHz for USB clock  | Enabled
   *-----------------------------------------------------------------------------
   *=============================================================================
   * @attention
@@ @@ -139,7 +139,7 @@ @@
 /** @addtogroup STM32L1xx_System_Private_Variables
   * @{
   */
-uint32_t SystemCoreClock    = 16000000;
+uint32_t SystemCoreClock    = 32000000;
 __I uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48};
 __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
@@ @@ -297,71 +297,85 @@ void SystemCoreClockUpdate (void) @@
   */
 static void SetSysClock(void)
+{
-  __IO uint32_t StartUpCounter = 0, HSIStatus = 0;
+  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
   /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/
   /* Enable HSI */
   RCC->CR |= ((uint32_t)RCC_CR_HSION);
   /* Enable HSE */
   RCC->CR |= ((uint32_t)RCC_CR_HSEON);
-  /* Wait till HSI is ready and if Time out is reached exit */
+  /* Wait till HSE is ready and if Time out is reached exit */
   do
+  {
     HSIStatus = RCC->CR & RCC_CR_HSIRDY;
   } while((HSIStatus == 0) && (StartUpCounter != HSI_STARTUP_TIMEOUT));
     HSEStatus = RCC->CR & RCC_CR_HSERDY;
     StartUpCounter++;
   } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
-  if ((RCC->CR & RCC_CR_HSIRDY) != RESET)
+  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
+  {
-    HSIStatus = (uint32_t)0x01;
+    HSEStatus = (uint32_t)0x01;
+  }
   else
+  {
-    HSIStatus = (uint32_t)0x00;
+    HSEStatus = (uint32_t)0x00;
+  }
-  if (HSIStatus == (uint32_t)0x01)
+  if (HSEStatus == (uint32_t)0x01)
+  {
     /* Flash 0 wait state */
     FLASH->ACR &= ~FLASH_ACR_LATENCY;
     /* Enable 64-bit access */
     FLASH->ACR |= FLASH_ACR_ACC64;
     /* Disable Prefetch Buffer */
     FLASH->ACR &= ~FLASH_ACR_PRFTEN;
     /* Enable Prefetch Buffer */
     FLASH->ACR |= FLASH_ACR_PRFTEN;
     /* Disable 64-bit access */
     FLASH->ACR &= ~FLASH_ACR_ACC64;
     /* Flash 1 wait state */
     FLASH->ACR |= FLASH_ACR_LATENCY;
     /* Power enable */
     RCC->APB1ENR |= RCC_APB1ENR_PWREN;
     /* Select the Voltage Range 2 (1.5 V) */
     PWR->CR = PWR_CR_VOS_1;
     /* Select the Voltage Range 1 (1.8 V) */
     PWR->CR = PWR_CR_VOS_0;
     /* Wait Until the Voltage Regulator is ready */
     while((PWR->CSR & PWR_CSR_VOSF) != RESET)
+    {
+    }
     /* HCLK = SYSCLK /2*/
     RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV2;
     /* HCLK = SYSCLK /1*/
     RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
     /* PCLK2 = HCLK /1*/
     RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;
     /* PCLK1 = HCLK /1*/
     RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;
     /* Select HSI as system clock source */
     /*  PLL configuration */
     RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL |
                                         RCC_CFGR_PLLDIV));
     RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMUL24 | RCC_CFGR_PLLDIV3);
     /* Enable PLL */
     RCC->CR |= RCC_CR_PLLON;
     /* Wait till PLL is ready */
     while((RCC->CR & RCC_CR_PLLRDY) == 0)
+    {
+    }
     /* Select PLL as system clock source */
     RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
-    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSI;
+    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
     /* Wait till HSI is used as system clock source */
     while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_HSI)
     /* Wait till PLL is used as system clock source */
     while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
+    {
+    }
+  }
   else
+  {
     /* If HSI fails to start-up, the application will have wrong clock
 	while(1);
     /* If HSE fails to start-up, the application will have wrong clock
        configuration. User can add here some code to deal with this error */
+  }
+}

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