therm Changeset - c941d532caa0 · protofusion repositories

Changeset - c941d532caa0

Parent rev.

Child rev.

[Not reviewed]

cortex-f0

0 2 2

Ethan Zonca - 10 years ago 2015-01-03 00:21:07
ez@ethanzonca.com

Added dummy system files, need to generate with the cube or spreadsheet

4 files changed with 492 insertions and 0 deletions:

main.c

ssd1306.c

system_stm32f0xx.c

385

system_stm32f0xx.h

105

0 comments (0 inline, 0 general)

main.c

➞

Show inline comments

 #include "main.h"
 #include "stm32f0xx_conf.h"
 #include "ssd1306.h"
 #include "config.h"
 #include "eeprom_min.h"
 #include "gpio.h"
 #include "spi.h"
 // USB includes
 //#include "hw_config.h"
 //#include "usb_lib.h"
 //#include "usb_desc.h"
 //#include "usb_pwr.h"
 //#include "stringhelpers.h"
 // TODO: Grab buttonpresses with interrupts
 // USB Supporting Vars
 extern __IO uint8_t Receive_Buffer[64];
 extern __IO  uint32_t Receive_length ;
 extern __IO  uint32_t length ;
 uint8_t Send_Buffer[64];
 uint32_t packet_sent=1;
 uint32_t packet_receive=1;
 enum tempunits {
     TEMP_UNITS_CELSIUS = 0,
     TEMP_UNITS_FAHRENHEIT,
 };
 // Globalish setting vars
 uint8_t boottobrew = 0;
 uint8_t temp_units = TEMP_UNITS_CELSIUS;
 uint16_t windup_guard = 1;
 uint16_t k_p = 1;
 uint16_t k_i = 1;
 uint16_t k_d = 1;
 uint8_t ignore_tc_error  = 0;
 // ISR ticks var
 volatile uint32_t ticks = 0;
 int16_t setpoint_brew = 0;
 int16_t setpoint_steam = 0;
 // State definition
 enum state {
     STATE_IDLE = 0,
     STATE_SETP,
     STATE_SETI,
     STATE_SETD,
     STATE_SETSTEPS,
     STATE_SETWINDUP,
     STATE_SETBOOTTOBREW,
     STATE_SETUNITS,
     STATE_PREHEAT_BREW,
     STATE_MAINTAIN_BREW,
     STATE_PREHEAT_STEAM,
     STATE_MAINTAIN_STEAM,
     STATE_TC_ERROR
 };
 uint8_t state = STATE_IDLE;
 static __IO uint32_t TimingDelay;
 // Move to header file
 void process();
 void machine();
 void restore_settings();
 void save_settings();
 void save_setpoints();
 int main(void)
+{
     // Init clocks
     SystemInit();
     // Init GPIO
     init_gpio();
     // Turn on power LED
     GPIO_SetBits(LED_POWER);
     // TODO: Awesome pwm of power LED (TIM4_CH4 or TIM11_CH1)
     // Configure 1ms SysTick (change if more temporal resolution needed)
     RCC_ClocksTypeDef RCC_Clocks;
     RCC_GetClocksFreq(&RCC_Clocks);
     SysTick_Config(RCC_Clocks.HCLK_Frequency / 1000);
     // Init SPI busses
     init_spi();
     // Init OLED over SPI
     ssd1306_Init();
     ssd1306_clearscreen();
     // Check for problems on startup
     uint8_t clock_fail = 0; // FIXME implement in system
     if(clock_fail) {
         //ssd1306_DrawStringBig("ERROR: Check Xtal", 2, 0);
         ssd1306_DrawStringBig("NO XTAL", 2, 0);
         delay(1000);
         ssd1306_clearscreen();
+    }
     // Init USB
     //Set_System(); // hw_config.h
     //Set_USBClock();
     //SB_Interrupts_Config();
     //SB_Init();
     //SYSCFG_USBPuCmd(ENABLE);
     //PowerOn();
     // Startup screen
     ssd1306_DrawString("therm v0.1", 1, 40);
     ssd1306_DrawString("protofusion.org/therm", 3, 0);
     delay(1500);
     ssd1306_clearscreen();
     restore_settings();
     if(boottobrew)
       state = STATE_PREHEAT_BREW; // Go to brew instead of idle if configured thusly
     GPIO_ResetBits(LED_STAT);
     // Main loop
     while(1)
+    {
         // Process sensor inputs
         process();
         // Run state machine
         machine();
+    }
+}
 // Read temperature and update global temp vars
 int32_t temp = 0;
 uint8_t temp_frac = 0;
 uint8_t state_resume = 0;
 void update_temp() {
     // Assert CS
     GPIO_ResetBits(MAX_CS);
     delay(1);
     // This may not clock at all... might need to send 16 bits first
     SPI_I2S_SendData(SPI2, 0xAAAA); // send dummy data
     //SPI_I2S_SendData(SPI2, 0xAA); // send dummy data
     uint16_t temp_pre = SPI_I2S_ReceiveData(SPI2);
     if(temp_pre & 0b0000000000000010) {
         ssd1306_DrawString("Fatal Error", 3, 35);
         state = STATE_TC_ERROR;
+    }
     else if(temp_pre & 0b0000000000000001 && !ignore_tc_error) {
         state_resume = state;
         state = STATE_TC_ERROR;
         temp = 0;
         temp_frac = 0;
+    }
     else
+    {
         if(state == STATE_TC_ERROR)
+        {
             state = state_resume;
             ssd1306_clearscreen();
+        }
         uint8_t sign = temp >> 15;// top bit is sign
         temp_pre = temp_pre >> 2; // Drop 2 lowest bits
         temp_frac = temp_pre & 0b11; // get fractional part
         temp_frac *= 25; // each bit is .25 a degree, up to fixed point
         temp_pre = temp_pre >> 2; // Drop 2 fractional bits
         if(sign) {
             temp = -temp_pre;
+        }
         else {
             temp = temp_pre;
+        }
         if(temp_units == TEMP_UNITS_FAHRENHEIT) {
             temp *= 9; // fixed point mul by 1.8
             temp /= 5;
             temp += 32;
             temp_frac *= 9;
             temp_frac /= 5;
             temp_frac += 32;
             temp += temp_frac/100; // add overflow to above
             temp_frac %= 100;
+        }
+    }
     // Deassert CS
     delay(1);
     GPIO_SetBits(MAX_CS);
+}
 // PID implementation
 // TODO: Make struct that has the last_temp and i_state in it, pass by ref. Make struct that has other input values maybe.
 int16_t last_pid_temp = 0;
 uint8_t last_pid_temp_frac = 0;
 int16_t i_state = 0;
 int16_t update_pid(uint16_t k_p, uint16_t k_i, uint16_t k_d, int16_t temp, uint8_t temp_frac, int16_t setpoint)
+{
   // Calculate instantaneous error
   int16_t error = (int16_t)setpoint - (int16_t)temp; // TODO: Use fixed point fraction
   // Proportional component
   int16_t p_term = k_p * error;
   // Error accumulator (integrator)
   i_state += error;
   // to prevent the iTerm getting huge despite lots of
   //  error, we use a "windup guard"
   // (this happens when the machine is first turned on and
   // it cant help be cold despite its best efforts)
   // not necessary, but this makes windup guard values
   // relative to the current iGain
   int16_t windup_guard_res = windup_guard / k_i;
   // Calculate integral term with windup guard
   if (i_state > windup_guard_res)
     i_state = windup_guard_res;
   else if (i_state < -windup_guard_res)
     i_state = -windup_guard_res;
   int16_t i_term = k_i * i_state;
   // Calculate differential term (slope since last iteration)
   int16_t d_term = (k_d * (temp - last_pid_temp));
   // Save temperature for next iteration
   last_pid_temp = temp;
   last_pid_temp_frac = temp_frac;
   int16_t result = p_term + i_term - d_term;
   // Put out tenths of percent, 0-1000.
   if(result > 1000)
     result = 1000;
   else if(result < -1000)
     result = -1000;
   // Return feedback
   return result;
+}
 uint32_t last_ssr_on = 0;
 uint32_t last_led = 0;
 int32_t setpoint = 0;
 int16_t ssr_output = 0; // Duty cycle of ssr, 0 to SSR_PERIOD
 uint8_t pid_enabled = 0;
 // Process things
 void process()
+{
     update_temp(); // Read MAX31855
     // TODO: Add calibration offset (linear)
     if(ticks - last_led > 400)
+    {
         GPIO_ToggleBits(LED_POWER);
         last_led = ticks;
+    }
     // Every 200ms, set the SSR on unless output is 0
     if((ticks - last_ssr_on > SSR_PERIOD))
+    {
         if(pid_enabled)
+        {
             // Get ssr output for next time
             int16_t power_percent = update_pid(k_p, k_i, k_d, temp, temp_frac, setpoint);
             //power-percent is 0-1000
             ssr_output = power_percent; //(((uint32_t)SSR_PERIOD * (uint32_t)10 * (uint32_t)100) * power_percent) / (uint32_t)1000000;
+        }
         else
+        {
             ssr_output = 0;
+        }
         // Only support heating (ssr_output > 0) right now
         if(ssr_output > 0) {
             char tempstr[6];
             itoa(ssr_output, tempstr);
             ssd1306_DrawString(tempstr, 0, 90);
             GPIO_SetBits(LED_STAT);
             GPIO_SetBits(SSR_PIN);
             last_ssr_on = ticks;
+        }
+    }
     // Kill SSR after elapsed period less than SSR_PERIOD
     if(ticks - last_ssr_on > ssr_output || ssr_output == 0)
+    {
         GPIO_ResetBits(LED_STAT);
         GPIO_ResetBits(SSR_PIN);
+    }
+}
 void draw_setpoint() {
     char tempstr[3];
     itoa_fp(temp, temp_frac, tempstr);
     ssd1306_DrawStringBig("      ", 3, 0);
     ssd1306_DrawStringBig(tempstr, 3, 0);
     ssd1306_DrawStringBig(">", 3, 74);
     itoa(setpoint, tempstr);
     ssd1306_DrawStringBig("    ", 3, 90);
     ssd1306_DrawStringBig(tempstr, 3, 90);
+}
 uint8_t goto_mode = 2;
 // State machine
 uint8_t sw_btn_last = 0;
 uint8_t sw_up_last = 0;
 uint8_t sw_down_last = 0;
 uint8_t sw_left_last = 0;
 uint8_t sw_right_last = 0;
 #define SW_BTN_PRESSED (sw_btn_last == 0 && sw_btn == 1) // rising edge on buttonpress
 #define SW_UP_PRESSED (sw_up_last == 0 && sw_up == 1)
 #define SW_DOWN_PRESSED (sw_down_last == 0 && sw_down == 1)
 #define SW_LEFT_PRESSED (sw_left_last == 0 && sw_left == 1)
 #define SW_RIGHT_PRESSED (sw_right_last == 0 && sw_right == 1)
 void save_settings()
+{
    Minimal_EEPROM_Unlock();
     // Try programming a word at an address divisible by 4
     Minimal_EEPROM_ProgramWord(EEPROM_BASE_ADDR + EEPROM_ADDR_BOOTTOBREW, boottobrew);
     Minimal_EEPROM_ProgramWord(EEPROM_BASE_ADDR + EEPROM_ADDR_WINDUP_GUARD, windup_guard);
     Minimal_EEPROM_ProgramWord(EEPROM_BASE_ADDR + EEPROM_ADDR_K_P, k_p);
     Minimal_EEPROM_ProgramWord(EEPROM_BASE_ADDR + EEPROM_ADDR_K_I, k_i);
     Minimal_EEPROM_ProgramWord(EEPROM_BASE_ADDR + EEPROM_ADDR_K_D, k_d);
     Minimal_EEPROM_ProgramWord(EEPROM_BASE_ADDR + EEPROM_ADDR_UNITS, temp_units);
     Minimal_EEPROM_Lock();
+}
 void save_setpoints()
+{
     Minimal_EEPROM_Unlock();
     Minimal_EEPROM_ProgramWord(EEPROM_BASE_ADDR + EEPROM_ADDR_BREWTEMP, setpoint_brew);
     Minimal_EEPROM_ProgramWord(EEPROM_BASE_ADDR + EEPROM_ADDR_STEAMTEMP, setpoint_steam);
     Minimal_EEPROM_Lock();
+}
 // TODO: Make a struct that has all settings in it. Pass by ref to this func in a library.
 void restore_settings()
+{
     Minimal_EEPROM_Unlock();
     while(Minimal_FLASH_GetStatus()==FLASH_BUSY);
     boottobrew = (*(__IO uint32_t*)(EEPROM_BASE_ADDR + EEPROM_ADDR_BOOTTOBREW));
     while(Minimal_FLASH_GetStatus()==FLASH_BUSY);
     windup_guard = (*(__IO uint32_t*)(EEPROM_BASE_ADDR + EEPROM_ADDR_WINDUP_GUARD));
     while(Minimal_FLASH_GetStatus()==FLASH_BUSY);
     k_p = (*(__IO uint32_t*)(EEPROM_BASE_ADDR + EEPROM_ADDR_K_P));
     while(Minimal_FLASH_GetStatus()==FLASH_BUSY);
     k_i = (*(__IO uint32_t*)(EEPROM_BASE_ADDR + EEPROM_ADDR_K_I));
     while(Minimal_FLASH_GetStatus()==FLASH_BUSY);
     k_d = (*(__IO uint32_t*)(EEPROM_BASE_ADDR + EEPROM_ADDR_K_D));
     while(Minimal_FLASH_GetStatus()==FLASH_BUSY);

ssd1306.c

➞

Show inline comments

 #include "stm32f0xx_conf.h"
 #include "ssd1306.h"
 // Write command to OLED
 void WriteCommand(unsigned char command)
+{
   SSD_A0_Low();
   SPI_SendByte(command);
   SPI_Wait();
+}
 // Write data to OLED
 void WriteData(unsigned char data)
+{
   SSD_A0_High();
   SPI_SendByte(data);
   SPI_Wait();
+}
 // Initialize OLED
 void ssd1306_Init(void)
+{
   /* Generate a reset */
   SSD_Reset_Low();
   uint32_t i;
   for(i=5000; i>1; i--)
   SSD_Reset_High();
   WriteCommand(0xAE);
   WriteCommand(0xD5);
   WriteCommand(0x80);
   WriteCommand(0xA8);
   WriteCommand(0x1F);
   WriteCommand(0xD3);
   WriteCommand(0x00);
   WriteCommand(0x40 | 0x00); // line #0
   WriteCommand(0x8D);
   WriteCommand(0x14); //10 or 14 if not externalvcc
   WriteCommand(0x20);
   WriteCommand(0x00);
 //  WriteCommand(0xA0 | 0x1); // segremap (normal)
   WriteCommand(0xA0); // segremap (flip)
 //  WriteCommand(0xC8); // comscandec (normal)
   WriteCommand(0xC0); // comscandec (flip)
   WriteCommand(0xDA); // setcompins
   WriteCommand(0x02);
   WriteCommand(0x81); // contrast
   WriteCommand(0x0F); // contrast value. 8f is a good one.
   WriteCommand(0xD9);
   WriteCommand(0xF1); //22 or F1 if not externalvcc
   WriteCommand(0xDB);
   WriteCommand(0x40);
   WriteCommand(0xA4); // dispalyallon_resume
   WriteCommand(0xA6); // normaldisplay
   WriteCommand(0xAF); // display on
+}
 // Times New Roman font
 const char fontData[240][5] =
 {                                       // Refer to "Times New Roman" Font Database
                                         //   Basic Characters
     {0x00,0x00,0x00,0x00,0x00},         //   (  0)    - 0x0020 No-Break Space
     {0x00,0x00,0x4F,0x00,0x00},         //   (  1)  ! - 0x0021 Exclamation Mark
     {0x00,0x07,0x00,0x07,0x00},         //   (  2)  " - 0x0022 Quotation Mark
     {0x14,0x7F,0x14,0x7F,0x14},         //   (  3)  # - 0x0023 Number Sign
     {0x24,0x2A,0x7F,0x2A,0x12},         //   (  4)  $ - 0x0024 Dollar Sign
     {0x23,0x13,0x08,0x64,0x62},         //   (  5)  % - 0x0025 Percent Sign
     {0x36,0x49,0x55,0x22,0x50},         //   (  6)  & - 0x0026 Ampersand
     {0x00,0x05,0x03,0x00,0x00},         //   (  7)  ' - 0x0027 Apostrophe
     {0x00,0x1C,0x22,0x41,0x00},         //   (  8)  ( - 0x0028 Left Parenthesis
     {0x00,0x41,0x22,0x1C,0x00},         //   (  9)  ) - 0x0029 Right Parenthesis
     {0x14,0x08,0x3E,0x08,0x14},         //   ( 10)  * - 0x002A Asterisk
     {0x08,0x08,0x3E,0x08,0x08},         //   ( 11)  + - 0x002B Plus Sign
     {0x00,0x50,0x30,0x00,0x00},         //   ( 12)  , - 0x002C Comma
     {0x08,0x08,0x08,0x08,0x08},         //   ( 13)  - - 0x002D Hyphen-Minus
     {0x00,0x60,0x60,0x00,0x00},         //   ( 14)  . - 0x002E Full Stop
     {0x20,0x10,0x08,0x04,0x02},         //   ( 15)  / - 0x002F Solidus
     {0x3E,0x51,0x49,0x45,0x3E},         //   ( 16)  0 - 0x0030 Digit Zero
     {0x00,0x42,0x7F,0x40,0x00},         //   ( 17)  1 - 0x0031 Digit One
     {0x42,0x61,0x51,0x49,0x46},         //   ( 18)  2 - 0x0032 Digit Two
     {0x21,0x41,0x45,0x4B,0x31},         //   ( 19)  3 - 0x0033 Digit Three
     {0x18,0x14,0x12,0x7F,0x10},         //   ( 20)  4 - 0x0034 Digit Four
     {0x27,0x45,0x45,0x45,0x39},         //   ( 21)  5 - 0x0035 Digit Five
     {0x3C,0x4A,0x49,0x49,0x30},         //   ( 22)  6 - 0x0036 Digit Six
     {0x01,0x71,0x09,0x05,0x03},         //   ( 23)  7 - 0x0037 Digit Seven
     {0x36,0x49,0x49,0x49,0x36},         //   ( 24)  8 - 0x0038 Digit Eight
     {0x06,0x49,0x49,0x29,0x1E},         //   ( 25)  9 - 0x0039 Dight Nine
     {0x00,0x36,0x36,0x00,0x00},         //   ( 26)  : - 0x003A Colon
     {0x00,0x56,0x36,0x00,0x00},         //   ( 27)  ; - 0x003B Semicolon
     {0x08,0x14,0x22,0x41,0x00},         //   ( 28)  < - 0x003C Less-Than Sign
     {0x14,0x14,0x14,0x14,0x14},         //   ( 29)  = - 0x003D Equals Sign
     {0x00,0x41,0x22,0x14,0x08},         //   ( 30)  > - 0x003E Greater-Than Sign
     {0x02,0x01,0x51,0x09,0x06},         //   ( 31)  ? - 0x003F Question Mark
     {0x32,0x49,0x79,0x41,0x3E},         //   ( 32)  @ - 0x0040 Commercial At
     {0x7E,0x11,0x11,0x11,0x7E},         //   ( 33)  A - 0x0041 Latin Capital Letter A
     {0x7F,0x49,0x49,0x49,0x36},         //   ( 34)  B - 0x0042 Latin Capital Letter B
     {0x3E,0x41,0x41,0x41,0x22},         //   ( 35)  C - 0x0043 Latin Capital Letter C
     {0x7F,0x41,0x41,0x22,0x1C},         //   ( 36)  D - 0x0044 Latin Capital Letter D
     {0x7F,0x49,0x49,0x49,0x41},         //   ( 37)  E - 0x0045 Latin Capital Letter E
     {0x7F,0x09,0x09,0x09,0x01},         //   ( 38)  F - 0x0046 Latin Capital Letter F
     {0x3E,0x41,0x49,0x49,0x7A},         //   ( 39)  G - 0x0047 Latin Capital Letter G
     {0x7F,0x08,0x08,0x08,0x7F},         //   ( 40)  H - 0x0048 Latin Capital Letter H
     {0x00,0x41,0x7F,0x41,0x00},         //   ( 41)  I - 0x0049 Latin Capital Letter I
     {0x20,0x40,0x41,0x3F,0x01},         //   ( 42)  J - 0x004A Latin Capital Letter J
     {0x7F,0x08,0x14,0x22,0x41},         //   ( 43)  K - 0x004B Latin Capital Letter K
     {0x7F,0x40,0x40,0x40,0x40},         //   ( 44)  L - 0x004C Latin Capital Letter L
     {0x7F,0x02,0x0C,0x02,0x7F},         //   ( 45)  M - 0x004D Latin Capital Letter M
     {0x7F,0x04,0x08,0x10,0x7F},         //   ( 46)  N - 0x004E Latin Capital Letter N
     {0x3E,0x41,0x41,0x41,0x3E},         //   ( 47)  O - 0x004F Latin Capital Letter O
     {0x7F,0x09,0x09,0x09,0x06},         //   ( 48)  P - 0x0050 Latin Capital Letter P
     {0x3E,0x41,0x51,0x21,0x5E},         //   ( 49)  Q - 0x0051 Latin Capital Letter Q
     {0x7F,0x09,0x19,0x29,0x46},         //   ( 50)  R - 0x0052 Latin Capital Letter R
     {0x46,0x49,0x49,0x49,0x31},         //   ( 51)  S - 0x0053 Latin Capital Letter S
     {0x01,0x01,0x7F,0x01,0x01},         //   ( 52)  T - 0x0054 Latin Capital Letter T
     {0x3F,0x40,0x40,0x40,0x3F},         //   ( 53)  U - 0x0055 Latin Capital Letter U
     {0x1F,0x20,0x40,0x20,0x1F},         //   ( 54)  V - 0x0056 Latin Capital Letter V
     {0x3F,0x40,0x38,0x40,0x3F},         //   ( 55)  W - 0x0057 Latin Capital Letter W
     {0x63,0x14,0x08,0x14,0x63},         //   ( 56)  X - 0x0058 Latin Capital Letter X
     {0x07,0x08,0x70,0x08,0x07},         //   ( 57)  Y - 0x0059 Latin Capital Letter Y
     {0x61,0x51,0x49,0x45,0x43},         //   ( 58)  Z - 0x005A Latin Capital Letter Z
     {0x00,0x7F,0x41,0x41,0x00},         //   ( 59)  [ - 0x005B Left Square Bracket
     {0x02,0x04,0x08,0x10,0x20},         //   ( 60)  \ - 0x005C Reverse Solidus
     {0x00,0x41,0x41,0x7F,0x00},         //   ( 61)  ] - 0x005D Right Square Bracket
     {0x04,0x02,0x01,0x02,0x04},         //   ( 62)  ^ - 0x005E Circumflex Accent
     {0x40,0x40,0x40,0x40,0x40},         //   ( 63)  _ - 0x005F Low Line
     {0x01,0x02,0x04,0x00,0x00},         //   ( 64)  ` - 0x0060 Grave Accent
     {0x20,0x54,0x54,0x54,0x78},         //   ( 65)  a - 0x0061 Latin Small Letter A
     {0x7F,0x48,0x44,0x44,0x38},         //   ( 66)  b - 0x0062 Latin Small Letter B
     {0x38,0x44,0x44,0x44,0x20},         //   ( 67)  c - 0x0063 Latin Small Letter C
     {0x38,0x44,0x44,0x48,0x7F},         //   ( 68)  d - 0x0064 Latin Small Letter D
     {0x38,0x54,0x54,0x54,0x18},         //   ( 69)  e - 0x0065 Latin Small Letter E
     {0x08,0x7E,0x09,0x01,0x02},         //   ( 70)  f - 0x0066 Latin Small Letter F
     {0x06,0x49,0x49,0x49,0x3F},         //   ( 71)  g - 0x0067 Latin Small Letter G
     {0x7F,0x08,0x04,0x04,0x78},         //   ( 72)  h - 0x0068 Latin Small Letter H
     {0x00,0x44,0x7D,0x40,0x00},         //   ( 73)  i - 0x0069 Latin Small Letter I
     {0x20,0x40,0x44,0x3D,0x00},         //   ( 74)  j - 0x006A Latin Small Letter J
     {0x7F,0x10,0x28,0x44,0x00},         //   ( 75)  k - 0x006B Latin Small Letter K
     {0x00,0x41,0x7F,0x40,0x00},         //   ( 76)  l - 0x006C Latin Small Letter L
     {0x7C,0x04,0x18,0x04,0x7C},         //   ( 77)  m - 0x006D Latin Small Letter M
     {0x7C,0x08,0x04,0x04,0x78},         //   ( 78)  n - 0x006E Latin Small Letter N
     {0x38,0x44,0x44,0x44,0x38},         //   ( 79)  o - 0x006F Latin Small Letter O
     {0x7C,0x14,0x14,0x14,0x08},         //   ( 80)  p - 0x0070 Latin Small Letter P
     {0x08,0x14,0x14,0x18,0x7C},         //   ( 81)  q - 0x0071 Latin Small Letter Q
     {0x7C,0x08,0x04,0x04,0x08},         //   ( 82)  r - 0x0072 Latin Small Letter R
     {0x48,0x54,0x54,0x54,0x20},         //   ( 83)  s - 0x0073 Latin Small Letter S
     {0x04,0x3F,0x44,0x40,0x20},         //   ( 84)  t - 0x0074 Latin Small Letter T
     {0x3C,0x40,0x40,0x20,0x7C},         //   ( 85)  u - 0x0075 Latin Small Letter U
     {0x1C,0x20,0x40,0x20,0x1C},         //   ( 86)  v - 0x0076 Latin Small Letter V
     {0x3C,0x40,0x30,0x40,0x3C},         //   ( 87)  w - 0x0077 Latin Small Letter W
     {0x44,0x28,0x10,0x28,0x44},         //   ( 88)  x - 0x0078 Latin Small Letter X
     {0x0C,0x50,0x50,0x50,0x3C},         //   ( 89)  y - 0x0079 Latin Small Letter Y
     {0x44,0x64,0x54,0x4C,0x44},         //   ( 90)  z - 0x007A Latin Small Letter Z
     {0x00,0x08,0x36,0x41,0x00},         //   ( 91)  { - 0x007B Left Curly Bracket
     {0x00,0x00,0x7F,0x00,0x00},         //   ( 92)  | - 0x007C Vertical Line
     {0x00,0x41,0x36,0x08,0x00},         //   ( 93)  } - 0x007D Right Curly Bracket
     {0x02,0x01,0x02,0x04,0x02},         //   ( 94)  ~ - 0x007E Tilde
     {0x08,0x14,0x2A,0x14,0x22},         //   ( 95) << - 0x00AB Left-Pointing Double Angle Quotation Mark
     {0x00,0x02,0x05,0x02,0x00},         //   ( 96)    - 0x00B0 Degree Sign
     {0x44,0x44,0x5F,0x44,0x44},         //   ( 97) +- - 0x00B1 Plus-Minus Sign
     {0x7E,0x20,0x20,0x10,0x3E},         //   ( 98)  u - 0x00B5 Micro Sign
     {0x22,0x14,0x2A,0x14,0x08},         //   ( 99) >> - 0x00BB Right-Pointing Double Angle Quotation Mark
     {0x30,0x48,0x45,0x40,0x20},         //   (100)  ? - 0x00BF Inverted Question Mark
     {0x22,0x14,0x08,0x14,0x22},         //   (101)  x - 0x00D7 Multiplcation Sign
     {0x08,0x08,0x2A,0x08,0x08},         //   (102)  + - 0x00F7 Division Sign
     {0x18,0x14,0x08,0x14,0x0C},         //   (103)    - 0x221E Infinity
     {0x44,0x4A,0x4A,0x51,0x51},         //   (104)  < - 0x2264 Less-Than or Equal to
     {0x51,0x51,0x4A,0x4A,0x44},         //   (105)  > - 0x2265 Greater-Than or Equal to
     {0x54,0x14,0x64,0x08,0x70},         //   (106)  .: - RF Symbol
     {0x70,0x7C,0x72,0x7C,0x70},         //   (107)  ^ - Lock symbol
     {0x70,0x5C,0x52,0x54,0x70},         //   (108)  / - Unlock symbol
     {0x0C,0x1E,0x3C,0x1E,0x0C},         //   (109)  <3 - Heart Symbol
     {0x18,0x22,0xFF,0x12,0x0C},         //   (110)  U - USB Symbol
 };
 void setStartPage(unsigned char d)
+{
     WriteCommand(0xB0|d);       // Set Page Start Address for Page Addressing Mode
                                 // Default => 0xB0 (0x00)
+}
 /* Below are functions used to configure the OLED */
 void setStartColumn(unsigned char d)
+{
     WriteCommand(0x00+d%16);    // Set Lower Column Start Address for Page Addressing Mode
     WriteCommand(0x10+d/16);    // Set Higher Column Start Address for Page Addressing Mode
                                 // Default => 0x10
+}
 const uint8_t row[4][32] = {
 	{0x00,0x00,0x01,0x03,0x07,0x0F,0x1E,0x3C,0x3C,0x7C,0x7C,0x7C,0xFC,0xFF,0xFF,0xFC,0xFC,0xFC,0xFC,0xFF,0x7F,0x7F,0x7F,0x3C,0x3C,0x1C,0x0C,0x06,0x03,0x01,0x00,0x00},
 	{0x0F,0x7F,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x3F,0x3F,0x7F,0xFF,0xFF,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x7F,0x0F},
 	{0xF0,0xFE,0xFF,0xFF,0xFF,0xC7,0x00,0x00,0x00,0x00,0x87,0xC7,0xC7,0xFF,0xFF,0x00,0x00,0x00,0x00,0x87,0x87,0xC7,0xC3,0x03,0x07,0x07,0x0F,0x7F,0xFF,0xFF,0xFE,0xF0},
 	{0x00,0x00,0x80,0xC0,0xE0,0xF0,0xF8,0xFC,0xFC,0xFE,0xFE,0xFE,0xFF,0xFF,0xFF,0x1F,0x1F,0x1F,0x1F,0xFF,0xFE,0xFE,0xFE,0xFC,0xFC,0xF8,0xF0,0xE0,0xC0,0x80,0x00,0x00},
 };
 void ssd1306_clearscreen()
+{
     uint8_t i = 0;
     uint8_t page = 0;
     for(page = 0; page<4; page++)
+    {
         setStartPage(page);
         setStartColumn(0);
         for(i = 0; i<128; i++)
+        {
             WriteData(0x00);
+        }
+    }
     WriteData(0x00);
+}
 void ssd1306_drawlogo()
+{
     uint8_t i = 0;
     setStartPage(3);
     setStartColumn(0);
     for(i = 0; i<32; i++)
+    {
         WriteData(row[0][i]);
+    }
     WriteData(0x00);
     setStartPage(2);
     setStartColumn(0);
     for(i = 0; i<32; i++)
+    {
         WriteData(row[1][i]);
+    }
     WriteData(0x00);
     setStartPage(1);
     setStartColumn(0);
     for(i = 0; i<32; i++)
+    {
         WriteData(row[2][i]);
+    }
     WriteData(0x00);
     setStartPage(0);
     setStartColumn(0);
     for(i = 0; i<32; i++)
+    {
         WriteData(row[3][i]);
+    }
     WriteData(0x00);
+}
 /* Print a single character from font.cpp */
 void ssd1306_DrawChar(char ascii, unsigned char row, unsigned char xPos)
+{
     char *srcPointer = -1;
     unsigned char i;
     srcPointer = &fontData[(ascii-32)][0];
     setStartPage(row);
     setStartColumn(xPos);
     for(i=0;i<5;i++)
+    {
         WriteData(*srcPointer);
         srcPointer++;
+    }
     WriteData(0x00);
+}
 void ssd1306_DrawCharBig(char ascii, unsigned char row, unsigned char xPos)
+{
     char *srcPointer = -1;
     unsigned char i;
     srcPointer = &fontData[(ascii-32)][0];
     setStartPage(row-1);
     setStartColumn(xPos);
     // Write first row
     for(i=0;i<5;i++)
+    {
         uint8_t data = 0;
         data |= ((*srcPointer) & 0b1000) << 4; // get top 4 bits
         data |= ((*srcPointer) & 0b1000) << 3; // get top 4 bits
         data |= ((*srcPointer) & 0b0100) << 3; // get top 4 bits
         data |= ((*srcPointer) & 0b0100) << 2; // get top 4 bits
         data |= ((*srcPointer) & 0b0010) << 2; // get top 4 bits
         data |= ((*srcPointer) & 0b0010) << 1; // get top 4 bits
         data |= ((*srcPointer) & 0b0001) << 1; // get top 4 bits
         data |= ((*srcPointer) & 0b0001); // get top 4 bits
         WriteData(data);
         WriteData(data);
         srcPointer++;
+    }
     WriteData(0x00);
     srcPointer -= 5;
     setStartPage(row);
     setStartColumn(xPos);
     // Write second row
     for(i=0;i<5;i++)
+    {
         uint8_t data = 0;
         data |=  (*srcPointer) & 0b10000000; // get top 4 bits
         data |= ((*srcPointer) & 0b10000000) >> 1; // get top 4 bits
         data |= ((*srcPointer) & 0b01000000) >> 1; // get top 4 bits
         data |= ((*srcPointer) & 0b01000000) >> 2; // get top 4 bits
         data |= ((*srcPointer) & 0b00100000) >> 2; // get top 4 bits
         data |= ((*srcPointer) & 0b00100000) >> 3; // get top 4 bits
         data |= ((*srcPointer) & 0b00010000) >> 3; // get top 4 bits
         data |= ((*srcPointer) & 0b00010000) >> 4; // get top 4 bits
         WriteData(data);
         WriteData(data);
         srcPointer++;
+    }
     WriteData(0x00);
+}
 void ssd1306_DrawString(const char *dataPtr, unsigned char row, unsigned char xPos)
+{
     char *srcPointer;
     srcPointer = (char*)dataPtr;
     ssd1306_DrawChar(' ',row,xPos); // NBSP must be written first before the string start
     while(1)
+    {
         ssd1306_DrawChar(*srcPointer,row,xPos);
         srcPointer++;
         xPos+=6;
         if(*srcPointer == 0) break;
+    }
+}
 void ssd1306_DrawStringBig(const char *dataPtr, unsigned char row, unsigned char xPos)
+{
     char *srcPointer;
     srcPointer = (char*)dataPtr;
     ssd1306_DrawCharBig(' ',row,xPos); // NBSP must be written first before the string start
     while(1)
+    {
         ssd1306_DrawCharBig(*srcPointer,row,xPos);
         srcPointer++;
         xPos+=12;
         if(*srcPointer == 0) break;
+    }
+}
 // vim:softtabstop=4 shiftwidth=4 expandtab

system_stm32f0xx.c

➞

Show inline comments

@@ new file 100644 @@
 /**
   ******************************************************************************
   * @file    system_stm32f0xx.c
   * @author  MCD Application Team
   * @version V1.0.0
   * @date    23-March-2012
   * @brief   CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
   *          This file contains the system clock configuration for STM32F0xx devices,
   *          and is customized for use with STM32F0-DISCOVERY Kit.
   *          The STM32F0xx is configured to run at 48 MHz, following the three
   *          configuration below:
   *            - PLL_SOURCE_HSI (default): HSI (~8MHz) used to clock the PLL, and
   *                                        the PLL is used as system clock source.
   *            - PLL_SOURCE_HSE          : HSE (8MHz) used to clock the PLL, and
   *                                        the PLL is used as system clock source.
   *            - PLL_SOURCE_HSE_BYPASS   : HSE bypassed with an external clock
   *                                        (8MHz, coming from ST-Link) used to clock
   *                                        the PLL, and the PLL is used as system
   *                                        clock source.
+  *
+  *
   * 1.  This file provides two functions and one global variable to be called from
   *     user application:
   *      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
   *                      and Divider factors, AHB/APBx prescalers and Flash settings),
   *                      depending on the configuration selected (see above).
   *                      This function is called at startup just after reset and
   *                      before branch to main program. This call is made inside
   *                      the "startup_stm32f0xx.s" file.
+  *
   *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
   *                                  by the user application to setup the SysTick
   *                                  timer or configure other parameters.
+  *
   *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
   *                                 be called whenever the core clock is changed
   *                                 during program execution.
+  *
   * 2. After each device reset the HSI (8 MHz Range) is used as system clock source.
   *    Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to
   *    configure the system clock before to branch to main program.
+  *
   * 3. If the system clock source selected by user fails to startup, the SystemInit()
   *    function will do nothing and HSI still used as system clock source. User can
   *    add some code to deal with this issue inside the SetSysClock() function.
+  *
   * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define
   *    in "stm32f0xx.h" file. When HSE is used as system clock source, directly or
   *    through PLL, and you are using different crystal you have to adapt the HSE
   *    value to your own configuration.
+  *
   ******************************************************************************
   * @attention
+  *
   * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
+  *
   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
   * You may not use this file except in compliance with the License.
   * You may obtain a copy of the License at:
+  *
   *        http://www.st.com/software_license_agreement_liberty_v2
+  *
   * Unless required by applicable law or agreed to in writing, software
   * distributed under the License is distributed on an "AS IS" BASIS,
   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
   * See the License for the specific language governing permissions and
   * limitations under the License.
+  *
   ******************************************************************************
   */
 /** @addtogroup CMSIS
   * @{
   */
 /** @addtogroup stm32f0xx_system
   * @{
   */
 /** @addtogroup STM32F0xx_System_Private_Includes
   * @{
   */
 #include "stm32f0xx.h"
 /**
   * @}
   */
 /** @addtogroup STM32F0xx_System_Private_TypesDefinitions
   * @{
   */
 /**
   * @}
   */
 /** @addtogroup STM32F0xx_System_Private_Defines
   * @{
   */
 /* Select the PLL clock source */
 #define PLL_SOURCE_HSI        // HSI (~8MHz) used to clock the PLL, and the PLL is used as system clock source
 //#define PLL_SOURCE_HSE        // HSE (8MHz) used to clock the PLL, and the PLL is used as system clock source
 //#define PLL_SOURCE_HSE_BYPASS // HSE bypassed with an external clock (8MHz, coming from ST-Link) used to clock
                               // the PLL, and the PLL is used as system clock source
 /**
   * @}
   */
 /** @addtogroup STM32F0xx_System_Private_Macros
   * @{
   */
 /**
   * @}
   */
 /** @addtogroup STM32F0xx_System_Private_Variables
   * @{
   */
 uint32_t SystemCoreClock    = 48000000;
 __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 /**
   * @}
   */
 /** @addtogroup STM32F0xx_System_Private_FunctionPrototypes
   * @{
   */
 static void SetSysClock(void);
 /**
   * @}
   */
 /** @addtogroup STM32F0xx_System_Private_Functions
   * @{
   */
 /**
   * @brief  Setup the microcontroller system.
   *         Initialize the Embedded Flash Interface, the PLL and update the
   *         SystemCoreClock variable.
   * @param  None
   * @retval None
   */
 void SystemInit (void)
+{
   /* Set HSION bit */
   RCC->CR |= (uint32_t)0x00000001;
   /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */
   RCC->CFGR &= (uint32_t)0xF8FFB80C;
   /* Reset HSEON, CSSON and PLLON bits */
   RCC->CR &= (uint32_t)0xFEF6FFFF;
   /* Reset HSEBYP bit */
   RCC->CR &= (uint32_t)0xFFFBFFFF;
   /* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */
   RCC->CFGR &= (uint32_t)0xFFC0FFFF;
   /* Reset PREDIV1[3:0] bits */
   RCC->CFGR2 &= (uint32_t)0xFFFFFFF0;
   /* Reset USARTSW[1:0], I2CSW, CECSW and ADCSW bits */
   RCC->CFGR3 &= (uint32_t)0xFFFFFEAC;
   /* Reset HSI14 bit */
   RCC->CR2 &= (uint32_t)0xFFFFFFFE;
   /* Disable all interrupts */
   RCC->CIR = 0x00000000;
   /* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */
   SetSysClock();
+}
 /**
   * @brief  Update SystemCoreClock according to Clock Register Values
   *         The SystemCoreClock variable contains the core clock (HCLK), it can
   *         be used by the user application to setup the SysTick timer or configure
   *         other parameters.
+  *
   * @note   Each time the core clock (HCLK) changes, this function must be called
   *         to update SystemCoreClock variable value. Otherwise, any configuration
   *         based on this variable will be incorrect.
+  *
   * @note   - The system frequency computed by this function is not the real
   *           frequency in the chip. It is calculated based on the predefined
   *           constant and the selected clock source:
+  *
   *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *
   *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *
   *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
   *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
   *         (*) HSI_VALUE is a constant defined in stm32f0xx.h file (default value
   *             8 MHz) but the real value may vary depending on the variations
   *             in voltage and temperature.
+  *
   *         (**) HSE_VALUE is a constant defined in stm32f0xx.h file (default value
   *              8 MHz), user has to ensure that HSE_VALUE is same as the real
   *              frequency of the crystal used. Otherwise, this function may
   *              have wrong result.
+  *
   *         - The result of this function could be not correct when using fractional
   *           value for HSE crystal.
   * @param  None
   * @retval None
   */
 void SystemCoreClockUpdate (void)
+{
   uint32_t tmp = 0, pllmull = 0, pllsource = 0, prediv1factor = 0;
   /* Get SYSCLK source -------------------------------------------------------*/
   tmp = RCC->CFGR & RCC_CFGR_SWS;
   switch (tmp)
+  {
     case 0x00:  /* HSI used as system clock */
       SystemCoreClock = HSI_VALUE;
       break;
     case 0x04:  /* HSE used as system clock */
       SystemCoreClock = HSE_VALUE;
       break;
     case 0x08:  /* PLL used as system clock */
       /* Get PLL clock source and multiplication factor ----------------------*/
       pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
       pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
       pllmull = ( pllmull >> 18) + 2;
       if (pllsource == 0x00)
+      {
         /* HSI oscillator clock divided by 2 selected as PLL clock entry */
         SystemCoreClock = (HSI_VALUE >> 1) * pllmull;
+      }
       else
+      {
         prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1;
         /* HSE oscillator clock selected as PREDIV1 clock entry */
         SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
+      }
       break;
     default: /* HSI used as system clock */
       SystemCoreClock = HSI_VALUE;
       break;
+  }
   /* Compute HCLK clock frequency ----------------*/
   /* Get HCLK prescaler */
   tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
   /* HCLK clock frequency */
   SystemCoreClock >>= tmp;
+}
 /**
   * @brief  Configures the System clock frequency, AHB/APBx prescalers and Flash
   *         settings.
   * @note   This function should be called only once the RCC clock configuration
   *         is reset to the default reset state (done in SystemInit() function).
   * @param  None
   * @retval None
   */
 static void SetSysClock(void)
+{
   __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
   /* SYSCLK, HCLK, PCLK configuration ----------------------------------------*/
 #if defined (PLL_SOURCE_HSI)
   /* At this stage the HSI is already enabled */
   /* Enable Prefetch Buffer and set Flash Latency */
   FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;
   /* HCLK = SYSCLK */
   RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
   /* PCLK = HCLK */
   RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;
   /* PLL configuration = (HSI/2) * 12 = ~48 MHz */
   RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
   RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSI_Div2 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL12);
   /* Enable PLL */
   RCC->CR |= RCC_CR_PLLON;
   /* Wait till PLL is ready */
   while((RCC->CR & RCC_CR_PLLRDY) == 0)
+  {
+  }
   /* Select PLL as system clock source */
   RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
   RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
   /* Wait till PLL is used as system clock source */
   while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
+  {
+  }
 #else
  #if defined (PLL_SOURCE_HSE)
   /* Enable HSE */
   RCC->CR |= ((uint32_t)RCC_CR_HSEON);
  #elif defined (PLL_SOURCE_HSE_BYPASS)
   /* HSE oscillator bypassed with external clock */
   RCC->CR |= (uint32_t)(RCC_CR_HSEON | RCC_CR_HSEBYP);
  #endif /* PLL_SOURCE_HSE */
   /* Wait till HSE is ready and if Time out is reached exit */
   do
+  {
     HSEStatus = RCC->CR & RCC_CR_HSERDY;
     StartUpCounter++;
   } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
   if ((RCC->CR & RCC_CR_HSERDY) != RESET)
+  {
     HSEStatus = (uint32_t)0x01;
+  }
   else
+  {
     HSEStatus = (uint32_t)0x00;
+  }
   if (HSEStatus == (uint32_t)0x01)
+  {
     /* Enable Prefetch Buffer and set Flash Latency */
     FLASH->ACR = FLASH_ACR_PRFTBE | FLASH_ACR_LATENCY;
     /* HCLK = SYSCLK */
     RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;
     /* PCLK = HCLK */
     RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE_DIV1;
     /* PLL configuration = HSE * 6 = 48 MHz */
     RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL));
     RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL6);
     /* Enable PLL */
     RCC->CR |= RCC_CR_PLLON;
     /* Wait till PLL is ready */
     while((RCC->CR & RCC_CR_PLLRDY) == 0)
+    {
+    }
     /* Select PLL as system clock source */
     RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
     RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;
     /* Wait till PLL is used as system clock source */
     while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)
+    {
+    }
+  }
   else
   { /* If HSE fails to start-up, the application will have wrong clock
          configuration. User can add here some code to deal with this error */
+  }
 #endif /* PLL_SOURCE_HSI */
+}
 /**
   * @}
   */
 /**
   * @}
   */
 /**
   * @}
   */
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

system_stm32f0xx.h

➞

Show inline comments

@@ new file 100644 @@
 /**
   ******************************************************************************
   * @file    system_stm32f0xx.h
   * @author  MCD Application Team
   * @version V1.0.0
   * @date    23-March-2012
   * @brief   CMSIS Cortex-M0 Device Peripheral Access Layer System Header File.
   ******************************************************************************
   * @attention
+  *
   * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
+  *
   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
   * You may not use this file except in compliance with the License.
   * You may obtain a copy of the License at:
+  *
   *        http://www.st.com/software_license_agreement_liberty_v2
+  *
   * Unless required by applicable law or agreed to in writing, software
   * distributed under the License is distributed on an "AS IS" BASIS,
   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
   * See the License for the specific language governing permissions and
   * limitations under the License.
+  *
   ******************************************************************************
   */
 /** @addtogroup CMSIS
   * @{
   */
 /** @addtogroup stm32f0xx_system
   * @{
   */
 /**
   * @brief Define to prevent recursive inclusion
   */
 #ifndef __SYSTEM_STM32F0XX_H
 #define __SYSTEM_STM32F0XX_H
 #ifdef __cplusplus
  extern "C" {
 #endif
 /** @addtogroup STM32F0xx_System_Includes
   * @{
   */
 /**
   * @}
   */
 /** @addtogroup STM32F0xx_System_Exported_types
   * @{
   */
 extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
 /**
   * @}
   */
 /** @addtogroup STM32F0xx_System_Exported_Constants
   * @{
   */
 /**
   * @}
   */
 /** @addtogroup STM32F0xx_System_Exported_Macros
   * @{
   */
 /**
   * @}
   */
 /** @addtogroup STM32F0xx_System_Exported_Functions
   * @{
   */
 extern void SystemInit(void);
 extern void SystemCoreClockUpdate(void);
 /**
   * @}
   */
 #ifdef __cplusplus
+}
 #endif
 #endif /*__SYSTEM_STM32F0XX_H */
 /**
   * @}
   */
 /**
   * @}
   */
 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

0 comments (0 inline, 0 general)