#include "main.h"

#include "stm32l100c_discovery.h"

#include "ssd1306.h"

static __IO uint32_t TimingDelay;

uint8_t BlinkSpeed = 0;

/* Main */

int main(void)

{

   RCC_ClocksTypeDef RCC_Clocks;

  /* Configure LED3 and LED4 on STM32L100C-Discovery */

  STM_EVAL_LEDInit(LED3);

  STM_EVAL_LEDInit(LED4);

  /* Initialize User_Button on STM32L100C-Discovery */

  //STM_EVAL_PBInit(BUTTON_USER, BUTTON_MODE_GPIO);

  /* SysTick end of count event each 1ms */

  RCC_GetClocksFreq(&RCC_Clocks);

  SysTick_Config(RCC_Clocks.HCLK_Frequency / 1000);

 /* Initiate Blink Speed variable */ 

  BlinkSpeed = 1;

 /* Init lcd driver */

  STM_EVAL_LEDOn(LED4);

  Delay(1000);

  STM_EVAL_LEDOff(LED4);

  Delay(1000);

  while(1)

  {  

      /* Turn on LD4 Blue LED during 1s each time User button is pressed */

      STM_EVAL_LEDOn(LED4);

      //STM_EVAL_LEDOn(LED3);

      /* wait for 1s */

      Delay(300);

      /* Turn off LD4 Blue LED after 1s each time User button is pressed */

      STM_EVAL_LEDOff(LED4);

      Delay(300);

  }

}

/**

  * @brief  Inserts a delay time.

  * @param  nTime: specifies the delay time length, in 1 ms.

* Date               : 10-01-21

* Description        : SSD1303 operations

*                      the SSH1101A is compatible with SSD1303

*******************************************************************************/

/* Includes ------------------------------------------------------------------*/

#include "stm32l100c_discovery.h"

#include "bsp.h"

#include "ssd1306.h"

#include "DrawText.h"

/* Private typedef -----------------------------------------------------------*/

/* Private define ------------------------------------------------------------*/

#define   SSD1303_PAGE_NUMBER           8

#define   SSD1303_COLUMN_NUMBER         128

#define   SSD1303_COLUMN_MARGIN_START   2

#define   SSD1303_COLUMN_MARGIN_END     2

#define   SSD1303_X_PIXEL   128

#define   SSD1303_Y_PIXEL   64

/* Private macro -------------------------------------------------------------*/

#define   SSD1303_Buffer    (_SSD1303_Buffer + SSD1303_COLUMN_MARGIN_START)

/* Private variables ---------------------------------------------------------*/

static  uint8_t  pageIndex = 0;

static  uint8_t  iS_SSD_On = 0;

static  uint8_t  pre_on = 0;

static  uint8_t  curContrast = 0xCC;

static  uint8_t  lastContrast = 0xCC;

/* Private function prototypes -----------------------------------------------*/

void  WriteCommand(unsigned char command);

void  WriteData(unsigned char data);

void  OnPageTransferDone(void);

unsigned long SSD1303_OFF(void);

unsigned long SSD1303_ON(void);

unsigned char* SSD1303_GetBuffer()

{

  return SSD1303_Buffer;

}

/*******************************************************************************

* Function Name  : WriteCommand

* Description    : Write command to the SSD1303

* Input          : None

* Output         : None

* Return         : None

*******************************************************************************/

void WriteCommand(unsigned char command)

/*******************************************************************************

* Function Name  : WriteData

* Description    : Write data to the SSD1303

* Input          : None

* Output         : None

* Return         : None

*******************************************************************************/

void WriteData(unsigned char data)

{

  SSD_A0_High();

  SPI_SendByte(data);

  SPI_Wait();

}

/*******************************************************************************

* Function Name  : SSD1303_Init

* Description    : Initialize the SSD1303

* Input          : None

* Output         : None

* Return         : None

*******************************************************************************/

void SSD1303_Init(void)

{

  /* Generate a reset */

  SSD_Reset_Low();

  uint32_t i ;

  for(i=5000;--i;);

  SSD_Reset_High();

  /*************************************************

  // SSD1303 Initialization Command

  *************************************************/

  // Lower Column Address

  WriteCommand(0x00); /* Set Lower Column Address */

  // High Column Address

  WriteCommand(0x10); /* Set Higher Column Address*/

  // Display Start Line

  WriteCommand(0x40); /* Set Display Start Line */

#ifdef    DEBUG_BOARD

  curContrast = lastContrast = 0x30;

#else

  curContrast = lastContrast = 0xCF;

#endif

  // Contrast Control Register

  WriteCommand(0x81); /* Set Contrast Control */

  WriteCommand(lastContrast); /* 0 ~ 255 0x1f*/

/**

  ******************************************************************************

  * @file    system_stm32l1xx.c

  * @author  MCD Application Team

  * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.

  *          This file contains the system clock configuration for STM32L1xx Ultra

  *          Low power devices, and is generated by the clock configuration 

  *             

  * 1.  This file provides two functions and one global variable to be called from 

  *     user application:

  *      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier

  *                      and Divider factors, AHB/APBx prescalers and Flash settings),

  *                      depending on the configuration made in the clock xls tool. 

  *                      This function is called at startup just after reset and 

  *                      before branch to main program. This call is made inside

  *                      the "startup_stm32l1xx_xx.s" file.

  *                        

  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used

  *                                  by the user application to setup the SysTick 

  *                                  timer or configure other parameters.

  *                                     

  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must

  *                                 be called whenever the core clock is changed

  *                                 during program execution.   

  *      

  * 2. After each device reset the MSI (2.1 MHz Range) is used as system clock source.

  *    Then SystemInit() function is called, in "startup_stm32l1xx_xx.s" file, to

  *    configure the system clock before to branch to main program.    

  *    

  * 3. If the system clock source selected by user fails to startup, the SystemInit()

  *    function will do nothing and MSI still used as system clock source. User can 

  *    add some code to deal with this issue inside the SetSysClock() function.       

  * 

  * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define

  *    in "stm32l1xx.h" file. When HSE is used as system clock source, directly or

  *    through PLL, and you are using different crystal you have to adapt the HSE

  *    value to your own configuration.

  * 

  * 5. This file configures the system clock as follows:  

  *=============================================================================

  *                         System Clock Configuration

  *=============================================================================

  *----------------------------------------------------------------------------- 

  *        SYSCLK                       | 32000000 Hz

  *----------------------------------------------------------------------------- 

  *        HCLK                         | 32000000 Hz

  *----------------------------------------------------------------------------- 

  *        AHB Prescaler                | 1

  *----------------------------------------------------------------------------- 

  *        APB1 Prescaler               | 1

  *----------------------------------------------------------------------------- 

  *        APB2 Prescaler               | 1

  *----------------------------------------------------------------------------- 

  *        HSE Frequency                | 8000000 Hz

  *----------------------------------------------------------------------------- 

  *----------------------------------------------------------------------------- 

  *----------------------------------------------------------------------------- 

  *        VDD                          | 3.3 V

  *----------------------------------------------------------------------------- 

  *        Vcore                        | 1.8 V (Range 1)

  *----------------------------------------------------------------------------- 

  *        Flash Latency                | 1 WS

  *----------------------------------------------------------------------------- 

  *----------------------------------------------------------------------------- 

  *=============================================================================

  * @attention

  *

  * <h2><center>&copy; COPYRIGHT 2013 STMicroelectronics</center></h2>

  *

  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");

  * You may not use this file except in compliance with the License.

  * You may obtain a copy of the License at:

  *

  *        http://www.st.com/software_license_agreement_liberty_v2

  *

  * Unless required by applicable law or agreed to in writing, software 

  * distributed under the License is distributed on an "AS IS" BASIS, 

  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

  * See the License for the specific language governing permissions and

  * limitations under the License.

  *

  ******************************************************************************

  */ 

/** @addtogroup CMSIS

  * @{

  */

/** @addtogroup stm32l1xx_system

      }

      break;

    default: /* MSI used as system clock */

      msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13;

      SystemCoreClock = (32768 * (1 << (msirange + 1)));

      break;

  }

  /* Compute HCLK clock frequency --------------------------------------------*/

  /* Get HCLK prescaler */

  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];

  /* HCLK clock frequency */

  SystemCoreClock >>= tmp;

}

/**

  * @brief  Configures the System clock frequency, AHB/APBx prescalers and Flash 

  *         settings.

  * @note   This function should be called only once the RCC clock configuration  

  *         is reset to the default reset state (done in SystemInit() function).             

  * @param  None

  * @retval None

  */

static void SetSysClock(void)

{

  /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/

  do

  {

  {

  }

  else

  {

  }

  {

    /* Enable 64-bit access */

    FLASH->ACR |= FLASH_ACR_ACC64;

    /* Enable Prefetch Buffer */

    FLASH->ACR |= FLASH_ACR_PRFTEN;

    /* Flash 1 wait state */

    FLASH->ACR |= FLASH_ACR_LATENCY;

    /* Power enable */

    RCC->APB1ENR |= RCC_APB1ENR_PWREN;

    /* Select the Voltage Range 1 (1.8 V) */

    PWR->CR = PWR_CR_VOS_0;

    /* Wait Until the Voltage Regulator is ready */

    while((PWR->CSR & PWR_CSR_VOSF) != RESET)

    {

    }

    /* HCLK = SYSCLK /1*/

    RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1;

    /* PCLK2 = HCLK /1*/

    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1;

    /* PCLK1 = HCLK /1*/

    RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1;

    /*  PLL configuration */

    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL |

                                        RCC_CFGR_PLLDIV));

    /* Enable PLL */

    RCC->CR |= RCC_CR_PLLON;

    /* Wait till PLL is ready */

    while((RCC->CR & RCC_CR_PLLRDY) == 0)

    {

    }

    /* Select PLL as system clock source */

    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));

    RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL;

    /* Wait till PLL is used as system clock source */

    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL)

    {

    }

  }

  else

  {

       configuration. User can add here some code to deal with this error */

  }

}

/**

  * @}

  */

/**

  * @}

  */

/**

  * @}

  */

/******************* (C) COPYRIGHT 2013 STMicroelectronics *****END OF FILE****/