The Cortex Microcontroller Software Interface Standard (CMSIS) is a vendor-independent hardware abstraction layer for the Cortex-M processor series. The CMSIS enables consistent and simple software interfaces to the processor and the peripherals, simplifying software re-use, reducing the learning curve for microcontroller developers, and reducing the time to market for new devices.
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The CMSIS is defined in close cooperation with various silicon and software vendors and provides a common approach to interface to peripherals, real-time operating systems, and middleware components. The CMSIS is intended to enable the combination of software components from multiple middleware vendors.
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The CMSIS components are:
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+- CMSIS-CORE: API for the Cortex-M processor core and peripherals. It provides at standardized interface for Cortex-M0, Cortex-M3, Cortex-M4, SC000, and SC300. Included are also SIMD intrinsic functions for Cortex-M4 SIMD instructions.
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+- CMSIS-DSP: DSP Library Collection with over 60 Functions for various data types: fix-point (fractional q7, q15, q31) and single precision floating-point (32-bit). The library is available for Cortex-M0, Cortex-M3, and Cortex-M4. The Cortex-M4 implementation is optimized for the SIMD instruction set.
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+- CMSIS-RTOS API: Common API for Real-Time operating systems. It provides a standardized programming interface that is portable to many RTOS and enables therefore software templates, middleware, libraries, and other components that can work acrosss supported the RTOS systems.
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+- CMSIS-SVD: System View Description for Peripherals. Describes the peripherals of a device in an XML file and can be used to create peripheral awareness in debuggers or header files with peripheral register and interrupt definitions.
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+- CMSIS-DAP: Debug Access Port. Standardized firmware for a Debug Unit that connects to the CoreSight Debug Access Port. CMSIS-DAP is distributed as separate package and well suited for integration on evaluation boards.
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+CMSIS Structure
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+Motivation
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CMSIS has been created to help the industry in standardization. It is not a huge software layer that introduces overhead and does not define standard peripherals. The silicon industry can therefore support the wide variations of Cortex-M processor-based devices with this common standard. In detail the benefits of the CMSIS are:
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+- Consistent software interfaces improve the software portability and re-usability. Generic software libraries can interface with device libraries from various silicon vendors.
+- Reduces the learning curve, development costs, and time-to-market. Developers can write software quicker through an easy to use and standardized software interface.
+- Provides a compiler independent layer that allows using different compilers. CMSIS is supported by all mainstream compilers (ARMCC, IAR, and GNU).
+- Enhances program debugging with peripheral information for debuggers and ITM channels for printf-style output and RTOS kernel awareness.
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+Coding Rules
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The CMSIS uses the following essential coding rules and conventions:
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+- Compliant with ANSI C and C++.
+- Uses ANSI C standard data types defined in <stdint.h>.
+- Variables and parameters have a complete data type.
+- Expressions for #define constants are enclosed in parenthesis.
+- Conforms to MISRA 2004. MIRSA rule violations are documented.
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In addition, the CMSIS recommends the following conventions for identifiers:
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+- CAPITAL names to identify Core Registers, Peripheral Registers, and CPU Instructions.
+- CamelCase names to identify function names and interrupt functions.
+- Namespace_ prefixes avoid clashes with user identifiers and provide functional groups (i.e. for peripherals, RTOS, or DSP Library).
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The CMSIS is documented within the source files with:
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+- Comments that use the C or C++ style.
+- Doxygen compliant function comments that provide:
+- brief function overview.
+- detailed description of the function.
+- detailed parameter explanation.
+- detailed information about return values.
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Doxygen comment example:
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/**
+ * @brief Enable Interrupt in NVIC Interrupt Controller
+ * @param IRQn interrupt number that specifies the interrupt
+ * @return none.
+ * Enable the specified interrupt in the NVIC Interrupt Controller.
+ * Other settings of the interrupt such as priority are not affected.
+ */
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+Licence
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The CMSIS is provided free of charge by ARM and can be used for all Cortex-M based devices.
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The software portions that are deployed in the application program are under a BSD license which allows usage of CMSIS in any commercial or open source projects.
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View the LICENCE AGREEMENT for CMSIS in detail.
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