diff --git a/startup_stm32f042x6.s b/startup_stm32f042x6.s
--- a/startup_stm32f042x6.s
+++ b/startup_stm32f042x6.s
@@ -84,15 +84,33 @@ Reset_Handler:
 
 /* Boot into bootloader */
 Reboot_Loader:
-  ldr r0, =0x1FFFF6A6 /* Address of bootloader on f042 from CD00167594 pg 15 table 3 */
-  /* This replaces ldr sp, [r0, #0] which doesn't work on m0 */
-  // Set stack pointer
-  ldr r1, [r0, #0]
-  mov sp, r1
+  LDR     R0, =0x40021018 // RCC_APB2ENR (+0x18)
+  LDR     R1, =0x00000001 // ENABLE SYSCFG CLOCK
+  STR     R1, [R0, #0]
+  LDR     R0, =0x40010000 // SYSCFG_CFGR1 (+0x00)
+  LDR     R1, =0x00000001 // MAP ROM AT ZERO
+  STR     R1, [R0, #0]
+  //                LDR     R0, =0x1FFFEC00 ; ROM BASE (STM32F03x)
+  LDR     R0, =0x1FFFC400 // ROM BASE (STM32F04x)
+  //                LDR     R0, =0x1FFFEC00 ; ROM BASE (STM32F05x)
+  //                LDR     R0, =0x1FFFC800 ; ROM BASE (STM32F07x)
+  //                LDR     R0, =0x1FFFD800 ; ROM BASE (STM32F09x)
+  LDR     R1, [R0, #0]    // SP @ +0
+  MOV     SP, R1
+  LDR     R0, [R0, #4]    // PC @ +4
+  BX      R0
+
+
+  // On reset, SP=value at address 0x0
+//  ldr r0, =0x00000000
+//  ldr r0, [r0, #0]
+//  mov sp, r0
+
+//  ldr r0, =0x1FFFC800 /* Address of bootloader on f042 from CD00167594 pg 15 table 3 */
 
   // Branch to bootloader
-  ldr r0, [r0, #4]
-  bx r0
+//  ldr r0, [r0, #4]
+//  bx r0
 
 
 CopyDataInit: