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Location: therm/spi.c - annotation
e93bd62dcae4
2.0 KiB
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Fix RAM size
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#include "stm32f0xx_hal_conf.h"
/*
void init_spi(SPI_HandleTypeDef* hspi1)
{
hspi1->Instance = SPI1;
hspi1->Init.Mode = SPI_MODE_MASTER;
hspi1->Init.Direction = SPI_DIRECTION_2LINES;
hspi1->Init.DataSize = SPI_DATASIZE_8BIT;
hspi1->Init.CLKPolarity = SPI_POLARITY_LOW;
hspi1->Init.CLKPhase = SPI_PHASE_1EDGE;
hspi1->Init.NSS = SPI_NSS_SOFT;
hspi1->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_8;
hspi1->Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1->Init.TIMode = SPI_TIMODE_DISABLED;
hspi1->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
hspi1->Init.NSSPMode = SPI_NSS_PULSE_ENABLED;
HAL_SPI_Init(hspi1);
}*/
/* OLD:
SPI_InitTypeDef SPI_InitStructure;
// OLED IC
SPI_Cmd(SPI1, DISABLE);
SPI_InitStructure.SPI_Direction = SPI_Direction_1Line_Tx;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
SPI_InitStructure.SPI_CPOL = SPI_CPOL_High;
SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge;
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI1, &SPI_InitStructure);
SPI_Cmd(SPI1, ENABLE);
// MAX IC
SPI_Cmd(SPI2, DISABLE);
SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
SPI_InitStructure.SPI_DataSize = SPI_DataSize_16b; // Andysworkshop
SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; // From andysworkshop
SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; // same
SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;
SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
SPI_InitStructure.SPI_CRCPolynomial = 7;
SPI_Init(SPI2, &SPI_InitStructure);
SPI_Cmd(SPI2, ENABLE);
*/
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