Changeset - b5b1fc08b294
[Not reviewed]
cortex-f0
0 5 0
Ethan Zonca - 10 years ago 2015-03-29 20:58:14
ez@ethanzonca.com
Added virtual serial port periodic transmission of temperature. Trying out bootloader code, but still doesn't work.
5 files changed with 53 insertions and 23 deletions:
0 comments (0 inline, 0 general)
config.h
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#ifndef CONFIG_H
 
#define CONFIG_H
 

	
 

	
 
#define VCP_TX_FREQ 1000
 
#define SSR_PERIOD 200
 

	
 
#define LED_POWER GPIOF,GPIO_PIN_0
 

	
 
#define MAX_CS GPIOA,GPIO_PIN_15
 

	
flash.sh
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#!/bin/bash
 
cd build
 
st-flash write main.bin 0x8000000
 
cd ..
 

	
 

	
 
# USB DFU:
 
# sudo  dfu-util -a 0 -d 0483:df11 -s 0x08000000:leave -D build/main.bin
main.c
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@@ -228,26 +228,12 @@ void update_temp() {
 
        // Use Celsius values
 
        else
 
        {
 
            temp = temp_pre * signint;
 
        }
 
    }
 
 
    // Print temp to cdc
 
/*
 
    CDC_Transmit_FS("Temp: ", 6);
 
    char tempstr[6];
 
    zitoa(temp, tempstr);
 
    CDC_Transmit_FS(tempstr, sizeof(tempstr));
 
 
    CDC_Transmit_FS("\r\n", 2);
 
    CDC_Transmit_FS("\r\n", 2);
 
    CDC_Transmit_FS("\r\n", 2);
 
    CDC_Transmit_FS("\r\n", 2);
 
    CDC_Transmit_FS("\r\n", 2);
 
*/
 
}
 
 
 
// PID implementation
 
// TODO: Make struct that has the last_temp and i_state in it, pass by ref. Make struct that has other input values maybe.
 
int16_t last_pid_temp = 0;
 
@@ -298,12 +284,13 @@ int16_t update_pid(uint16_t k_p, uint16_
 
  // Return feedback
 
  return result;
 
}
 
 
 
uint32_t last_ssr_on = 0;
 
uint32_t last_vcp_tx = 0;
 
uint32_t last_led = 0;
 
int32_t setpoint = 0;
 
int16_t ssr_output = 0; // Duty cycle of ssr, 0 to SSR_PERIOD 
 
uint8_t pid_enabled = 0;
 
 
// Process things
 
@@ -349,12 +336,24 @@ void process()
 
    
 
    // Kill SSR after elapsed period less than SSR_PERIOD 
 
    if(ticks - last_ssr_on > ssr_output || ssr_output == 0)
 
    {
 
        HAL_GPIO_WritePin(SSR_PIN, 0);
 
    }
 
 
    if(ticks - last_vcp_tx > VCP_TX_FREQ)
 
    {
 
        // Print temp to cdc
 
        char tempstr[6];
 
        itoa_fp(temp, temp_frac, tempstr);
 
 
        while(CDC_Transmit_FS(tempstr, sizeof(tempstr)) == USBD_BUSY);
 
        while(CDC_Transmit_FS("\r\n", 2) == USBD_BUSY);
 
 
        last_vcp_tx = ticks;
 
    }
 
}
 
 
 
uint8_t goto_mode = 2;
 
 
// State machine
 
@@ -533,13 +532,19 @@ void machine()
 
                        break;
 
                    case 0:
 
                    {
 
                        ssd1306_clearscreen();
 
                        ssd1306_DrawString("Entering Bootloader", 1, 0);
 
                        ssd1306_DrawString("(hopefully)", 2, 0);
 
                        HAL_Delay(1000);
 
                        //HAL_Delay(1000);
 
                        HAL_RCC_DeInit();
 
                        SysTick->CTRL = 0;
 
                        SysTick->LOAD = 0;
 
                        SysTick->VAL = 0;
 
                        __set_PRIMASK(1);
 
                        __set_MSP(0x200010000);
 
                        *((unsigned long *)0x200017F0) = 0xDEADBEEF; // 6KB STM32F042
 
                        NVIC_SystemReset();
 
 
                        state = STATE_IDLE;
 
                    } break;
 
startup_stm32f042x6.s
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@@ -81,21 +81,39 @@ Reset_Handler:
 
/* Copy the data segment initializers from flash to SRAM */
 
  movs r1, #0
 
  b LoopCopyDataInit
 
 
/* Boot into bootloader */
 
Reboot_Loader:
 
  ldr r0, =0x1FFFF6A6 /* Address of bootloader on f042 from CD00167594 pg 15 table 3 */
 
  /* This replaces ldr sp, [r0, #0] which doesn't work on m0 */
 
  // Set stack pointer
 
  ldr r1, [r0, #0]
 
  mov sp, r1
 
  LDR     R0, =0x40021018 // RCC_APB2ENR (+0x18)
 
  LDR     R1, =0x00000001 // ENABLE SYSCFG CLOCK
 
  STR     R1, [R0, #0]
 
  LDR     R0, =0x40010000 // SYSCFG_CFGR1 (+0x00)
 
  LDR     R1, =0x00000001 // MAP ROM AT ZERO
 
  STR     R1, [R0, #0]
 
  //                LDR     R0, =0x1FFFEC00 ; ROM BASE (STM32F03x)
 
  LDR     R0, =0x1FFFC400 // ROM BASE (STM32F04x)
 
  //                LDR     R0, =0x1FFFEC00 ; ROM BASE (STM32F05x)
 
  //                LDR     R0, =0x1FFFC800 ; ROM BASE (STM32F07x)
 
  //                LDR     R0, =0x1FFFD800 ; ROM BASE (STM32F09x)
 
  LDR     R1, [R0, #0]    // SP @ +0
 
  MOV     SP, R1
 
  LDR     R0, [R0, #4]    // PC @ +4
 
  BX      R0
 
 
 
  // On reset, SP=value at address 0x0
 
//  ldr r0, =0x00000000
 
//  ldr r0, [r0, #0]
 
//  mov sp, r0
 
 
//  ldr r0, =0x1FFFC800 /* Address of bootloader on f042 from CD00167594 pg 15 table 3 */
 
 
  // Branch to bootloader
 
  ldr r0, [r0, #4]
 
  bx r0
 
//  ldr r0, [r0, #4]
 
//  bx r0
 
 
 
CopyDataInit:
 
  ldr r3, =_sidata
 
  ldr r3, [r3, r1]
 
  str r3, [r0, r1]
usbd_cdc_if.c
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@@ -287,16 +287,19 @@ static int8_t CDC_Receive_FS (uint8_t* B
 
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
 
{
 
    uint8_t result = USBD_OK;
 
    /* USER CODE BEGIN 8 */
 
    uint16_t i;
 
 
 
    // Zero out user TX buffer (EMZ FIXME: why bother?)
 
    for (i=0; i < sizeof(UserTxBufferFS); i++) {
 
	UserTxBufferFS[i] = 0;
 
    }
 
 
    // Copy input buff to user TX buffer
 
    for (i=0; i < Len; i++) {
 
	UserTxBufferFS[i] = Buf[i];
 
    }
 
 
    USBD_CDC_SetTxBuffer(hUsbDevice_0, UserTxBufferFS, Len);
 
    result = USBD_CDC_TransmitPacket(hUsbDevice_0);
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