Files
@ a48d9ffdc5db
Branch filter:
Location: therm/libraries/u8glib/u8g_dev_pcd8544_84x48.c
a48d9ffdc5db
5.6 KiB
text/plain
Oled driver updates and pin assignment fixes
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 | /*
u8g_dev_pcd8544_84x48.c
Display: Nokia 84x48
Status: Tested with PCF8812 Display
Universal 8bit Graphics Library
Copyright (c) 2011, olikraus@gmail.com
All rights reserved.
Redistribution and use in source and binary forms, with or without modification,
are permitted provided that the following conditions are met:
* Redistributions of source code must retain the above copyright notice, this list
of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright notice, this
list of conditions and the following disclaimer in the documentation and/or other
materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "u8g.h"
#define WIDTH 84
#define HEIGHT 48
#define PAGE_HEIGHT 8
static const uint8_t u8g_dev_pcd8544_init_seq[] PROGMEM = {
U8G_ESC_CS(0), /* disable chip */
U8G_ESC_ADR(0), /* instruction mode */
U8G_ESC_RST(1), /* do reset low pulse with (1*16)+2 milliseconds */
U8G_ESC_CS(1), /* enable chip */
0x021, /* activate chip (PD=0), horizontal increment (V=0), enter extended command set (H=1) */
0x006, /* temp. control: b10 = 2 */
0x013, /* bias system 1:48 */
0x0c0, /* medium Vop */
0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
0x00c, /* display on, normal operation */
U8G_ESC_DLY(100), /* delay 100 ms */
0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
0x00d, /* display on, invert */
U8G_ESC_DLY(100), /* delay 100 ms */
U8G_ESC_DLY(100), /* delay 100 ms */
0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
0x00c, /* display on, normal */
U8G_ESC_DLY(100), /* delay 100 ms */
U8G_ESC_CS(0), /* disable chip */
U8G_ESC_END /* end of sequence */
};
static const uint8_t u8g_dev_pcd8544_sleep_on[] PROGMEM = {
U8G_ESC_ADR(0), /* instruction mode */
U8G_ESC_CS(1), /* enable chip */
0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
0x00c, /* display on, normal */
U8G_ESC_CS(1), /* disable chip */
U8G_ESC_END /* end of sequence */
};
static const uint8_t u8g_dev_pcd8544_sleep_off[] PROGMEM = {
U8G_ESC_ADR(0), /* instruction mode */
U8G_ESC_CS(1), /* enable chip */
0x020, /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
0x008, /* display blank */
0x024, /* power down (PD=1), horizontal increment (V=0), enter normal command set (H=0) */
U8G_ESC_DLY(50), /* delay 50 ms */
U8G_ESC_CS(1), /* disable chip */
U8G_ESC_END /* end of sequence */
};
uint8_t u8g_dev_pcd8544_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg)
{
switch(msg)
{
case U8G_DEV_MSG_INIT:
u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS);
u8g_WriteEscSeqP(u8g, dev, u8g_dev_pcd8544_init_seq);
break;
case U8G_DEV_MSG_STOP:
break;
case U8G_DEV_MSG_PAGE_NEXT:
{
u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem);
u8g_SetAddress(u8g, dev, 0); /* command mode */
u8g_SetChipSelect(u8g, dev, 1);
u8g_WriteByte(u8g, dev, 0x020 ); /* activate chip (PD=0), horizontal increment (V=0), enter normal command set (H=0) */
u8g_WriteByte(u8g, dev, 0x080 ); /* set X address */
u8g_WriteByte(u8g, dev, 0x040 | pb->p.page); /* set Y address */
u8g_SetAddress(u8g, dev, 1); /* data mode */
if ( u8g_pb_WriteBuffer(pb, u8g, dev) == 0 )
return 0;
u8g_SetChipSelect(u8g, dev, 0);
}
break;
case U8G_DEV_MSG_CONTRAST:
/* the contrast adjustment does not work, needs to be analysed */
u8g_SetAddress(u8g, dev, 0); /* instruction mode */
u8g_SetChipSelect(u8g, dev, 1);
u8g_WriteByte(u8g, dev, 0x021); /* command mode, extended function set */
u8g_WriteByte(u8g, dev, 0x080 | ( (*(uint8_t *)arg) >> 1 ) );
u8g_SetChipSelect(u8g, dev, 0);
return 1;
case U8G_DEV_MSG_SLEEP_ON:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_pcd8544_sleep_on);
return 1;
case U8G_DEV_MSG_SLEEP_OFF:
u8g_WriteEscSeqP(u8g, dev, u8g_dev_pcd8544_sleep_off);
return 1;
}
return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg);
}
U8G_PB_DEV(u8g_dev_pcd8544_84x48_sw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_pcd8544_fn, U8G_COM_SW_SPI);
U8G_PB_DEV(u8g_dev_pcd8544_84x48_hw_spi , WIDTH, HEIGHT, PAGE_HEIGHT, u8g_dev_pcd8544_fn, U8G_COM_HW_SPI);
|