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<title>CMSIS: Introduction</title>
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<div id="projectname">CMSIS
 <span id="projectnumber">Version 3.20</span>
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<div id="projectbrief">Cortex Microcontroller Software Interface Standard</div>
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<li class="current"><a href="../../General/html/index.html"><span>CMSIS</span></a></li>
<li><a href="../../Core/html/index.html"><span>CORE</span></a></li>
<li><a href="../../DSP/html/index.html"><span>DSP</span></a></li>
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<div class="title">Introduction </div> </div>
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<div class="textblock"><p>The <b>Cortex Microcontroller Software Interface Standard</b> (CMSIS) is a vendor-independent hardware abstraction layer for the Cortex-M processor series. The CMSIS enables consistent and simple software interfaces to the processor and the peripherals, simplifying software re-use, reducing the learning curve for microcontroller developers, and reducing the time to market for new devices.</p>
<p>The CMSIS is defined in close cooperation with various silicon and software vendors and provides a common approach to interface to peripherals, real-time operating systems, and middleware components. The CMSIS is intended to enable the combination of software components from multiple middleware vendors.</p>
<p>The CMSIS components are:</p>
<ul>
<li><a href="../../Core/html/index.html"><b>CMSIS-CORE</b></a>: API for the Cortex-M processor core and peripherals. It provides at standardized interface for Cortex-M0, Cortex-M3, Cortex-M4, SC000, and SC300. Included are also SIMD intrinsic functions for Cortex-M4 SIMD instructions.</li>
</ul>
<ul>
<li><a href="../../DSP/html/index.html"><b>CMSIS-DSP</b></a>: DSP Library Collection with over 60 Functions for various data types: fix-point (fractional q7, q15, q31) and single precision floating-point (32-bit). The library is available for Cortex-M0, Cortex-M3, and Cortex-M4. The Cortex-M4 implementation is optimized for the SIMD instruction set.</li>
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<li><a href="../../RTOS/html/index.html"><b>CMSIS-RTOS API</b></a>: Common API for Real-Time operating systems. It provides a standardized programming interface that is portable to many RTOS and enables therefore software templates, middleware, libraries, and other components that can work acrosss supported the RTOS systems.</li>
</ul>
<ul>
<li><a href="../../SVD/html/index.html"><b>CMSIS-SVD</b></a>: System View Description for Peripherals. Describes the peripherals of a device in an XML file and can be used to create peripheral awareness in debuggers or header files with peripheral register and interrupt definitions.</li>
</ul>
<ul>
<li><a href="www.arm.com/cmsis" target="_blank"><b>CMSIS-DAP</b></a>: Debug Access Port. Standardized firmware for a Debug Unit that connects to the CoreSight Debug Access Port. CMSIS-DAP is distributed as separate package and well suited for integration on evaluation boards.</li>
</ul>
<div class="image">
<img src="CMSIS_V3_small.png" alt="CMSIS_V3_small.png"/>
<div class="caption">
CMSIS Structure</div></div>
<h1><a class="anchor" id="Motivation"></a>
Motivation</h1>
<p>CMSIS has been created to help the industry in standardization. It is not a huge software layer that introduces overhead and does not define standard peripherals. The silicon industry can therefore support the wide variations of Cortex-M processor-based devices with this common standard. In detail the benefits of the CMSIS are:</p>
<ul>
<li>Consistent software interfaces improve the software portability and re-usability. Generic software libraries can interface with device libraries from various silicon vendors.</li>
<li>Reduces the learning curve, development costs, and time-to-market. Developers can write software quicker through an easy to use and standardized software interface.</li>
<li>Provides a compiler independent layer that allows using different compilers. CMSIS is supported by all mainstream compilers (ARMCC, IAR, and GNU).</li>
<li>Enhances program debugging with peripheral information for debuggers and ITM channels for printf-style output and RTOS kernel awareness.</li>
</ul>
<h1><a class="anchor" id="CodingRules"></a>
Coding Rules</h1>
<p>The CMSIS uses the following essential coding rules and conventions:</p>
<ul>
<li>Compliant with ANSI C and C++.</li>
<li>Uses ANSI C standard data types defined in <b><stdint.h></b>.</li>
<li>Variables and parameters have a complete data type.</li>
<li>Expressions for <em>#define</em> constants are enclosed in parenthesis.</li>
<li>Conforms to MISRA 2004. MIRSA rule violations are documented.</li>
</ul>
<p>In addition, the CMSIS recommends the following conventions for identifiers:</p>
<ul>
<li><b>CAPITAL</b> names to identify Core Registers, Peripheral Registers, and CPU Instructions.</li>
<li><b>CamelCase</b> names to identify function names and interrupt functions.</li>
<li><b>Namespace_</b> prefixes avoid clashes with user identifiers and provide functional groups (i.e. for peripherals, RTOS, or DSP Library).</li>
</ul>
<p>The CMSIS is documented within the source files with: </p>
<ul>
<li>Comments that use the C or C++ style. </li>
<li>Doxygen compliant <b>function comments</b> that provide:<ul>
<li>brief function overview.</li>
<li>detailed description of the function.</li>
<li>detailed parameter explanation.</li>
<li>detailed information about return values.</li>
</ul>
</li>
</ul>
<p>Doxygen comment example: </p>
<pre class="fragment">/**
* @brief Enable Interrupt in NVIC Interrupt Controller
* @param IRQn interrupt number that specifies the interrupt
* @return none.
* Enable the specified interrupt in the NVIC Interrupt Controller.
* Other settings of the interrupt such as priority are not affected.
*/
</pre><h1><a class="anchor" id="License"></a>
Licence</h1>
<p>The CMSIS is provided free of charge by ARM and can be used for all Cortex-M based devices.</p>
<p>The software portions that are deployed in the application program are under a BSD license which allows usage of CMSIS in any commercial or open source projects.</p>
<p>View the <a href="..\..\..\CMSIS END USER LICENCE AGREEMENT.pdf">LICENCE AGREEMENT for CMSIS</a> in detail. </p>
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